ZHCSH19F November 2017 – November 2023 TCAN1043-Q1 , TCAN1043G-Q1 , TCAN1043H-Q1 , TCAN1043HG-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
DRIVER SWITCHING CHARACTERISTICS | ||||||||
tpHR | Propagation delay time, high TXD to driver recessive | See Figure 7-2, Normal mode. RL = 60 Ω, CL = 100 pF, RCM = open | 50 | ns | ||||
tpLD | Propagation delay time, low TXD to driver dominant | 40 | ns | |||||
tsk(p) | Pulse skew (|tpHR - tpLD|) | 10 | ns | |||||
tR | Differential output signal rise time | 45 | ns | |||||
tF | Differential output signal fall time | 45 | ns | |||||
tTXD_DTO | Dominant time out | See Figure 7-9, RL = 60 Ω, CL = open | 1.2 | 3.8 | ms | |||
RECEIVER SWITCHING CHARACTERISTICS | ||||||||
tpRH | Propagation delay time, bus recessive input to high RXD | See Figure 7-3 CL(RXD) = 15 pF | 50 | ns | ||||
tpDL | Propagation delay time, bus dominant input to RXD low output | 50 | ns | |||||
tR | Output signal rise time (RXD) | 8 | ns | |||||
tF | Output signal fall time (RXD) | 8 | ns | |||||
tBUS_DOM | Dominant time out | See Figure 17, RL = 60 Ω, CL = open | 1.3 | 3.8 | ms | |||
tCBF | Bus fault detection time | 45 Ω ≤ RCM ≤ 70 Ω, CL = open | 1.9 | µs | ||||
Wake Terminal (Wake input) | ||||||||
tWAKE_HT | WAKE hold time | See Figure 7-12 and Figure 7-13 Time required for LWU from a high to low or low to high on WAKE | 5 | 50 | µs | |||
Device Switching Characteristics | ||||||||
tPROP(LOOP1) | Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant | See Figure 7-5, Normal mode, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF | 100 | 160 | ns | |||
tPROP(LOOP2) | Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive | 110 | 175 | ns | ||||
tMODE1 | Mode change time | See Figure 7-4 and Figure 7-5, Mode change time for leaving Sleep mode to entering normal and silent mode after VCC and VIO have crossed UV thresholds | 20 | µs | ||||
tMODE2 | Mode change time | Mode changes between Normal, Silent and Standby modes, and Sleep to Standby mode transition | 10 | µs | ||||
tUV_RE-ENABLE | Re-enable time after under voltage event | Time for device to return to normal operation from UVVCC or UVVIO under voltage event | 200 | µs | ||||
tPower_Up | Power up time on VSUP | See Figure 7-11 | 250 | µs | ||||
tWK_FILTER | Bus time to meet filtered bus requirements for wake up request | See Figure 8-5 | 0.5 | 1.8 | µs | |||
tWK_TIMEOUT | Bus Wake-up timeout value | See Figure 8-5 | 0.5 | 2 | ms | |||
tUV | Undervoltage filter time for VIO and VCC | VIO ≤ UVVIO or VCC < UVVCC | 159 | 340 | ms | |||
tGo_To_Sleep | Minimum hold time for transition to sleep mode | EN = H and nSTB = L | 5 | 50 | µs | |||
FD Timing Parameters | ||||||||
tBIT(BUS) | Bit time on CAN bus output pins with tBIT(TXD) = 500 ns, all devices | Normal mode, RL = 60 Ω, CL = 100 pF, CL(RXD) = 15 pF, ΔtREC = tBIT(RXD) - tBIT(BUS) | 435 | 530 | ns | |||
Bit time on CAN bus output pins with tBIT(TXD) = 200 ns, G device variants only | 155 | 210 | ns | |||||
tBIT(RXD) | Bit time on RXD output pins with tBIT(TXD) = 500 ns, all devices | 400 | 550 | ns | ||||
Bit time on RXD output pins with tBIT(TXD) = 200 ns, G device variants only | 120 | 220 | ns | |||||
ΔtREC | Receiver timing symmetry with tBIT(TXD) = 500 ns, all devices | -65 | 40 | ns | ||||
Receiver timing symmetry with tBIT(TXD) = 200 ns, G device variants only | -45 | 15 | ns |