ZHCSCR8D September   2014  – October 2017 TCA9534

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Interrupt Output (INT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 9.2.1.2 Minimizing ICC when I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

PW, DW Package
16-Pin TSSOP, SOIC
Top View
TCA9534 po_cps197.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 A0 I Address input. Connect directly to VCC or ground
2 A1 I Address input. Connect directly to VCC or ground
3 A2 I Address input. Connect directly to VCC or ground
4 P0 I/O P-port input-output. Push-pull design structure. At power on, P0 is configured as an input
5 P1 I/O P-port input-output. Push-pull design structure. At power on, P1 is configured as an input
6 P2 I/O P-port input-output. Push-pull design structure. At power on, P2 is configured as an input
7 P3 I/O P-port input-output. Push-pull design structure. At power on, P3 is configured as an input
8 GND — Ground
9 P4 I/O P-port input-output. Push-pull design structure. At power on, P4 is configured as an input
10 P5 I/O P-port input-output. Push-pull design structure. At power on, P5 is configured as an input
11 P6 I/O P-port input-output. Push-pull design structure. At power on, P6 is configured as an input
12 P7 I/O P-port input-output. Push-pull design structure. At power on, P7 is configured as an input
13 INT O Interrupt output. Connect to VCC through a pullup resistor
14 SCL I/O Serial clock bus. Connect to VCC through a pullup resistor
15 SDA I/O Serial data bus. Connect to VCC through a pullup resistor
16 VCC — Supply voltage