SCAS298O January   1993  – June 2026 SN54LVC541A , SN74LVC541A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   5
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics—DC Limit Changes
    6. 5.6  Switching Characteristics - SN54LVC541A
    7. 5.7  Switching Characteristics, SN74LVC541A –40°C to 85°C
    8. 5.8  Switching Characteristics, SN74LVC541A –40°C to 125°C
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  8. 6 Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS 3-State Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 Standard CMOS Inputs
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Pin Configuration and Functions

SN54LVC541A SN74LVC541A SN54LVC541A J , W Package (Top View)Figure 4-1 SN54LVC541A J , W Package (Top View)
SN54LVC541A SN74LVC541A SN54LVC541A FK Package (Top View)Figure 4-2 SN54LVC541A FK Package (Top View)
Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
A1 2 I Input for channel 1
A2 3 I Input for channel 2
A3 4 I Input for channel 3
A4 5 I Input for channel 4
A5 6 I Input for channel 5
A6 7 I Input for channel 6
A7 8 I Input for channel 7
A8 9 I Input for channel 8
GND 10 G Ground
OE1 1 I Output enable 1, active low
OE2 19 I Output enable 2, active low
VCC 20 P Positive supply
Y1 18 O Output for channel 1
Y2 17 O Output for channel 2
Y3 16 O Output for channel 3
Y4 15 O Output for channel 4
Y5 14 O Output for channel 5
Y6 13 O Output for channel 6
Y7 12 O Output for channel 7
Y8 11 O Output for channel 8
(1) Signal Types: I = Input, O = Output, G = Ground, P = Power.
SN54LVC541A SN74LVC541A SN74LVC541A RKS Package (Top View)Figure 4-3 SN74LVC541A RKS Package (Top View)
SN54LVC541A SN74LVC541A SN74LVC541A PW, DW, NS, DB, DGS, DGV Package (Top View)Figure 4-4 SN74LVC541A PW, DW, NS, DB, DGS, DGV Package
(Top View)
Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
A1 2 I Input for channel 1
A2 3 I Input for channel 2
A3 4 I Input for channel 3
A4 5 I Input for channel 4
A5 6 I Input for channel 5
A6 7 I Input for channel 6
A7 8 I Input for channel 7
A8 9 I Input for channel 8
GND 10 G Ground
OE1 1 I Output enable 1, active low
OE2 19 I Output enable 2, active low
Thermal Pad(2) — The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply.
VCC 20 P Positive supply
Y1 18 O Output for channel 1
Y2 17 O Output for channel 2
Y3 16 O Output for channel 3
Y4 15 O Output for channel 4
Y5 14 O Output for channel 5
Y6 13 O Output for channel 6
Y7 12 O Output for channel 7
Y8 11 O Output for channel 8
(1) Signal Types: I = Input, O = Output, G = Ground, P = Power.
(2) RKS package only.