ZHCSJ95Q July   2001  – January 2019 SN74LVC2G53

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      逻辑图
      2.      每次转换 (SW) 逻辑图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Analog Switch Characteristics
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DCU|8
  • YZP|8
  • DCT|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Recommended Operating Conditions

See note(1).
MIN MAX UNIT
VCC Supply voltage 1.65 5.5 V
VI/O I/O port voltage 0 VCC V
VIH High-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.65 V
VCC = 2.3 V to 2.7 V VCC × 0.7
VCC = 3 V to 3.6 V VCC × 0.7
VCC = 4.5 V to 5.5 V VCC × 0.7
VIL Low-level input voltage, control input VCC = 1.65 V to 1.95 V VCC × 0.35 V
VCC = 2.3 V to 2.7 V VCC × 0.3
VCC = 3 V to 3.6 V VCC × 0.3
VCC = 4.5 V to 5.5 V VCC × 0.3
VI Control input voltage 0 5.5 V
Δt/Δv Input transition rise and fall time VCC = 1.65 V to 1.95 V 20 ns/V
VCC = 2.3 V to 2.7 V 20
VCC = 3 V to 3.6 V 10
VCC = 4.5 V to 5.5 V 10
TA Operating free-air temperature –40 85 °C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating CMOS Inputs, SCBA004.