ZHCSWD3C September   2003  – May 2024 SN74LVC257A-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 说明
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PW|16
  • BQB|16
  • D|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

Pin Configuration and Functions

SN74LVC257A-Q1 D or PW Package,16-Pin SOIC or TSSOP(Top View)Figure 3-1 D or PW Package,16-Pin SOIC or TSSOP(Top View)
SN74LVC257A-Q1 BQB Package,16-Pin WQFN with Exposed Thermal Pad(Top View)Figure 3-2 BQB Package,16-Pin WQFN with Exposed Thermal Pad(Top View)
Table 3-1 Pin Functions
PIN I/O DESCRIPTION
NAME SOIC, TSSOP, or WQFN
A/B 1 I Select Pin, Low selects A, High selects B
1A 2 I/O Multiplexer Signal Input
1B 3 I/O Multiplexer Signal Input
1Y 4 I/O Multiplexer Output
2A 5 I/O Multiplexer Signal Input
2B 6 I/O Multiplexer Signal Input
2Y 7 I/O Multiplexer Output
3A 11 I/O Multiplexer Signal Input
3B 10 I/O Multiplexer Signal Input
3Y 9 I/O Multiplexer Output
4A 14 I/O Multiplexer Signal Input
4B 13 I/O Multiplexer Signal Input
4Y 12 I/O Multiplexer Output
GND 8 Ground
NC(1) No connect
OE 15 I/O Active low Output enable
VCC 16 Power pin
NC – no internal connection