ZHCSRA4L May   1998  – March 2023 SN74LV374A

PRODMIX  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    7. 6.7  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 6.8  Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 6.9  Timing Requirements
    10. 6.10 Noise Characteristics
    11. 6.11 Operating Characteristics, TA = 25°C
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  11. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DB|20
  • NS|20
  • PW|20
  • DW|20
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.9 Timing Requirements

over recommended operating free-air temperature range, (unless otherwise noted) (see Load Circuit and Voltage Waveforms)
TA = 25°C SN74LV374A
–40°C to +85°C		 SN74LV374A
–40°C to +125°C		 UNIT
MIN MAX MIN MAX MIN MAX
VCC = 2.5 V ± 0.2 V
tw Pulse duration, CLK high or low 6 7 7 ns
tsu Setup time, data before CLK↑ 5 5.5 6 ns
th Hold time, data after CLK↑ 2.5 2.5 3 ns
VCC = 3.3 V ± 0.3 V
tw Pulse duration, CLK high or low 5 5.5 5.5 ns
tsu Setup time, data before CLK↑ 4.5 4.5 5 ns
th Hold time, data after CLK↑ 2 2 2.5 ns
VCC = 5 V ± 0.5 V
tw Pulse duration, CLK high or low 5 5 5 ns
tsu Setup time, data before CLK↑ 3 3 3.5 ns
th Hold time, data after CLK↑ 2 2 2.5 ns