9.2.1.1 Output Considerations
In general, the load needs to be considered in the design to determine if the device will have the capability to drive it. For this application, we assume that the flip-flop output is transmitting over a relatively short trace (under 10 cm) to a CMOS input.
Primary load factors to consider:
- Load Capacitance: approximately 15 pF
- See the Switching Characteristics section for the capacitive loads tested with this device.
- Increasing capacitance will proportionally increase output transition times.
- Decreasing capacitance will proportionally decrease output transition times, and can produce ringing due to very fast transition rates. A 25-Ω resistor can be added in series with the output if ringing needs to be dampened.
- Load Current: expected maximum of 10 µA
- Leakage current into connected devices.
- Parasitic current from other components.
- Resistive load current.
- Output Voltage: see Electrical Characteristics for output voltage ratings at a given current.
- Output HIGH (VOH) and output LOW (VOL) voltage levels affect the input voltage, VIH and VIL, respectively, to subsequent devices.