ZHCSKK0F December   2019  – December 2021 SN74HCS595-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Operating Characteristics
    9.     15
    10. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1 Balanced CMOS 3-State Outputs
      2. 8.2.2 Balanced CMOS Push-Pull Outputs
      3. 8.2.3 Latching Logic
      4. 8.2.4 Clamp Diode Structure
      5. 8.2.5 Wettable Flanks
    3. 8.3 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

GUID-77437250-2CCB-4CED-9FFE-AFDA41812B6A-low.gifFigure 5-1 D, PW, or DYY Package
16-Pin SOIC, TSSOP, or SOT
Top View
GUID-20200810-CA0I-Q9NM-WJZN-2VVL5S1MZF0C-low.gifFigure 5-2 WBQB (Preview) or BQB Package
16-Pin WQFN
Transparent Top View
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
QB 1 Output QB output
QC 2 Output QC output
QD 3 Output QD output
QE 4 Output QE output
QF 5 Output QF output
QG 6 Output QG output
QH 7 Output QH output
GND 8 — Ground
QH' 9 Output Serial output, can be used for cascading
SRCLR 10 Input Shift register clear, active low
SRCLK 11 Input Shift register clock, rising edge triggered
RCLK 12 Input Output register clock, rising edge triggered
OE 13 Input Output Enable, active low
SER 14 Input Serial input
QA 15 Output QA output
VCC 16 — Positive supply
Thermal Pad(1) — The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
(1) BQB and WBQB package only.