ZHCSHK6E December   2017  – December 2023 SN74AXC1T45

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics: TA = 25°C
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 0.65-V to 3.6-V Power-Supply Range
      2. 7.3.2 I/Os with Integrated Static Pull-Down Resistors
      3. 7.3.3 Support High-Speed Translation
      4. 7.3.4 Ioff Supports Partial-Power-Down Mode Operation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Enable Times
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Logic Level-Shifting Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Logic Level-Shifting Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-Up Considerations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Revision History

Changes from Revision D (October 2021) to Revision E (December 2023)

  • Added the I/Os with Integrated Static Pull-Down Resistors sectionGo

Changes from Revision C (September 2020) to Revision D (October 2021)

  • Updated the Pin Configuration and Functions section to include DRL and DEA packagesGo

Changes from Revision B (June 2018) to Revision C (September 2020)

  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 将所有表更新为最新的 3d 表格式Go
  • Updated ICCA, ICCB, and ICCA + ICCB to reflect updated performance of device.Go

Changes from Revision A (April 2018) to Revision B (June 2018)

  • 添加了 DEA 和 DTQ 作为可用封装选项Go
  • 将产品状态从“量产混合”更改为“量产数据”Go

Changes from Revision * (December 2017) to Revision A (April 2018)

  • Added pinout drawing for DEA package Go
  • Added pinout drawing for DTQ package Go