ZHCSS10D august   2003  – june 2023 SN74AHC04-Q1

PRODMIX  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    7. 6.7 Switching Characteristics, VCC = 5 V ± 0.5 V
    8. 6.8 Noise Characteristics
    9. 6.9 Operating Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Power Supply Recommendations
    2. 9.2 Layout
      1. 9.2.1 Layout Guidelines
        1. 9.2.1.1 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Document Support (Analog)
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|14
  • PW|14
  • BQA|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout Guidelines

When using multiple bit logic devices inputs should not ever float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Layout Diagram are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC; whichever makes more sense or is more convenient. It is generally acceptable to float outputs unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the outputs section of the part when asserted. This will not disable the input section of the IOs, so they cannot float when disabled.