11.1 Layout Guidelines
Figure 34 illustrates an example of a printed-circuit board (PCB) layout using the REF29xx. Some key considerations are:
- Connect low-ESR, 0.1-µF ceramic bypass capacitors at VIN of the REF29xx
- Decouple other active devices in the system per the device specifications
- Use a solid ground plane to help distribute heat and reduces electromagnetic interference (EMI) noise pickup
- Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring
- Minimize trace length between the reference and bias connections to the INA and ADC to reduce noise pickup
- Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary