SLES023D December   2001  – December 2016 PCM1802

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
      1. 6.6.1 Typical Characteristics: Internal Filter
        1. 6.6.1.1 Digital Filter: Decimation Filter Frequency Response
        2. 6.6.1.2 HPF (High-Pass Filter) Frequency Response
        3. 6.6.1.3 Analog Filter: Antialiasing Filter Frequence Response
      2. 6.6.2 Typical Characteristics: Output Spectrum
      3. 6.6.3 Typical Characteristics: Supply Current
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Hardware Control
      2. 7.3.2 Power-On Reset Sequence
      3. 7.3.3 System Clock
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Down, HPF Bypass, Oversampling Control
      2. 7.4.2 Serial Audio Data Interface
        1. 7.4.2.1 Data Format
        2. 7.4.2.2 Interface Timing
        3. 7.4.2.3 Synchronization With Digital Audio System
      3. 7.4.3 Master Mode
      4. 7.4.4 Slave Mode
      5. 7.4.5 Interface Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Control Pins
        2. 8.2.2.2 DSP or Audio Processor
        3. 8.2.2.3 Input Filters
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 VCC and VDD Pins
      2. 10.1.2 AGND and DGND Pins
      3. 10.1.3 VIN Pins
      4. 10.1.4 VREF1 Pin
      5. 10.1.5 VREF2 Pin
      6. 10.1.6 DOUT Pin
      7. 10.1.7 System Clock
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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Pin Configuration and Functions

DB Package
20-Pin SSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
AGND 6 Analog GND
BCK 11 I/O Bit clock input and output(1)
BYPAS 8 I HPF bypass control. Low: normal mode (DC cut); High: bypass mode (through)(2)
DGND 13 Digital GND
DOUT 12 O Audio data output
FMT0 17 I Audio data format select 0 (see Data Format)(2)
FMT1 18 I Audio data format select 1 (see Data Format)(2)
FSYNC 9 I/O Frame synchronous clock input and output(1)
LRCK 10 I/O Sampling clock input and output(1)
MODE0 19 I Mode select 0 (see Interface Mode)(2)
MODE1 20 I Mode select 1 (see Interface Mode)(2)
OSR 16 I Oversampling ratio select. Low: ×64 fS; High: ×128 fS(2)
PDWN 7 I Power-down control, active-low(2)
SCKI 15 I System clock input; 256 fS, 384 fS, 512 fS, or 768 fS(3)
VCC 5 Analog power supply, 5 V
VDD 14 Digital power supply, 3.3 V
VINL 1 I Analog input, L-channel
VINR 2 I Analog input, R-channel
VREF1 3 Reference-1 decoupling capacitor
VREF2 4 Reference-2 voltage input, normally connected to VCC
Schmitt-Trigger input
Schmitt-Trigger input with internal pulldown (50 kΩ typically), 5-V tolerant
Schmitt-Trigger input, 5-V tolerant