ZHCSEE9B August   2004  – December 2015 PCM1794A

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 System Clock Input
      2. 7.3.2 Power-On and External Reset Functions
      3. 7.3.3 Audio Data Interface
        1. 7.3.3.1 Audio Serial Interface
        2. 7.3.3.2 PCM Audio Data Formats and Timing
      4. 7.3.4 Audio Data Format
      5. 7.3.5 Soft Mute
      6. 7.3.6 De-Emphasis
      7. 7.3.7 Zero Detect
      8. 7.3.8 Advanced Segment DAC
      9. 7.3.9 Analog Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Control
      2. 7.4.2 Audio Input Modes
      3. 7.4.3 Audio Output Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 I/V Section
      2. 8.1.2 Differential Section
      3. 8.1.3 Interfacing With an External Digital Filter
        1. 8.1.3.1 System Clock (SCK) and Interface Timing
        2. 8.1.3.2 Audio Format
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Audio Input or Output
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档 
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DB|28
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DB Package
28-Pin SSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 MONO I Monaural mode enable(1)
2 CHSL I L-channel, R-channel select(1)
3 DEM I De-emphasis enable(1)
4 LRCK I Left and right clock (fS) input(1)
5 DATA I Serial audio data input(1)
6 BCK I Bit clock input(1)
7 SCK I System clock input(1)
8 DGND Digital ground
9 VDD Digital power supply, 3.3 V
10 MUTE I Mute control(1)
11 FMT0 I Audio data format select(1)
12 FMT1 I Audio data format select(1)
13 ZERO O Zero flag
14 RST I Reset(1)
15 VCC2R Analog power supply (R-channel DAC), 5 V
16 AGND3R Analog ground (R-channel DAC)
17 IOUTR+ O R-channel analog current output +
18 IOUTR– O R-channel analog current output –
19 AGND1 Analog ground (internal bias)
20 IREF Output current reference bias pin
21 VCOMR R-channel internal bias decoupling pin
22 VCOML L-channel internal bias decoupling pin
23 VCC1 Analog power supply, 5 V
24 AGND2 Analog ground (internal bias)
25 IOUTL+ O L-channel analog current output +
26 IOUTL– O L-channel analog current output –
27 AGND3L Analog ground (L-channel DAC)
28 VCC2L Analog power supply (L-channel DAC), 5 V
(1) Schmitt-trigger input, 5-V tolerant.