ZHCSNI9K August   2005  – March 2021 PCA9535

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Description Continued
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Resistance Characteristics
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1.     16
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
      1. 8.2.1 Power-On Reset
      2. 8.2.2 I/O Port
      3. 8.2.3 Interrupt ( INT) Output
        1. 8.2.3.1 Interrupt Errata
          1.        24
          2.        25
          3.        26
    3. 8.3 Programming
      1. 8.3.1 I2C Interface
      2. 8.3.2 Register Map
        1. 8.3.2.1 Device Address
        2. 8.3.2.2 Control Register And Command Byte
        3. 8.3.2.3 Register Descriptions
        4. 8.3.2.4 Bus Transactions
          1. 8.3.2.4.1 Writes
          2. 8.3.2.4.2 Reads
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Minimizing ICC When I/O Is Used To Control Led
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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8.3.2.1 Device Address

Figure 8-6 shows the address byte of the PCA9535.

GUID-A431D407-537A-41FD-AEA2-DFBFB7B70206-low.gifFigure 8-6 Pca9535 Address
Table 8-2 Address Reference
INPUTSI2C BUS SLAVE ADDRESS
A2A1A0
LLL32 (decimal), 20 (hexadecimal)
LLH33 (decimal), 21 (hexadecimal)
LHL34 (decimal), 22 (hexadecimal)
LHH35 (decimal), 23 (hexadecimal)
HLL36 (decimal), 24 (hexadecimal)
HLH37 (decimal), 25 (hexadecimal)
HHL38 (decimal), 26 (hexadecimal)
HHH39 (decimal), 27 (hexadecimal)

The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read operation, while a low (0) selects a write operation.