ZHCSFG0 September   2016 ONET1131EC

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Function
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 AC Electrical Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Timing Diagram Definitions
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Equalizer
      2. 7.3.2 CDR
      3. 7.3.3 Modulator Driver
      4. 7.3.4 Modulation Current Generator
      5. 7.3.5 DC Offset Cancellation and Cross Point Control
      6. 7.3.6 Bias Current Generation and APC Loop
      7. 7.3.7 Laser Safety Features and Fault Recovery Procedure
      8. 7.3.8 Analog Block
        1. 7.3.8.1 Analog Reference and Temperature Sensor
        2. 7.3.8.2 Power-On Reset
        3. 7.3.8.3 Analog to Digital Converter
          1. 7.3.8.3.1 Temperature
          2. 7.3.8.3.2 Power Supply Voltage
          3. 7.3.8.3.3 Photodiode Current Monitor
          4. 7.3.8.3.4 Bias Current Monitor
        4. 7.3.8.4 2-Wire Interface and Control Logic
        5. 7.3.8.5 Bus Idle
        6. 7.3.8.6 Start Data Transfer
        7. 7.3.8.7 Stop Data Transfer
        8. 7.3.8.8 Data Transfer
      9. 7.3.9 Acknowledge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Differential Transmitter Output
      2. 7.4.2 Single-Ended Transmitter Output
    5. 7.5 Programming
    6. 7.6 Register Mapping
      1. 7.6.1 R/W Control Registers
        1. 7.6.1.1 Core Level Register 0 (offset = 0100 0001 [reset = 41h]
        2. 7.6.1.2 Core Level Register 1 (offset = 0000 0000) [reset = 0h]
        3. 7.6.1.3 Core Level Register 2 (offset = 0000 0000 ) [reset = 0h]
        4. 7.6.1.4 Core Level Register 3 (offset = 0000 0000) [reset = 0h]
      2. 7.6.2 RX Registers
        1. 7.6.2.1 RX Register 4 (offset = 0000 0000) [reset = 0h]
        2. 7.6.2.2 RX Register 5 (offset = 0000 0000) [reset = 0h]
      3. 7.6.3 TX Registers
        1. 7.6.3.1  TX Register 10 (offset = 0000 0000) [reset = 0h]
        2. 7.6.3.2  TX Register 11 (offset = 0000 0000) [reset = 0h]
        3. 7.6.3.3  TX Register 12 (offset = 0000 0000) [reset = 0h]
        4. 7.6.3.4  TX Register 13 (offset = 0h) [reset = 0]
        5. 7.6.3.5  TX Register 14 (offset = 0000 0000) [reset = 0h]
        6. 7.6.3.6  TX Register 15 (offset = 0000 0000) [reset = 0h]
        7. 7.6.3.7  TX Register 16 (offset = 0000 0000) [reset = 0h]
        8. 7.6.3.8  TX Register 17 (offset = 0000 0000) [reset = 0h]
        9. 7.6.3.9  TX Register 18 (offset = 0000 0000) [reset = 0h]
        10. 7.6.3.10 TX Register 19 (offset = 0000 0000) [reset = 0h]
      4. 7.6.4 Reserved Registers
        1. 7.6.4.1 Reserved Registers 20-39
      5. 7.6.5 Read Only Registers
        1. 7.6.5.1 Core Level Register 40 (offset = 0000 0000) [reset = 0h]
        2. 7.6.5.2 Core Level Register 41 (offset = 0000 0000) [reset = 0h]
        3. 7.6.5.3 RX Registers 42 (offset = 0000 0000) [reset = 0h]
        4. 7.6.5.4 TX Register 43 (offset = 0000 0000) [reset = 0h]
      6. 7.6.6 Adjustment Registers
        1. 7.6.6.1 Adjustment Registers 44-50
        2. 7.6.6.2 Adjustment Register 51 (offset = 0100 0000) [reset = 40h]
        3. 7.6.6.3 Adjustment Registers 52-55
  8. 8 Application Information and Implementations
    1. 8.1 Application Information
    2. 8.2 Typical Application, Transmitter Differential Mode
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 Typical Application, Transmitter Single-Ended Mode
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Layout

10.1 Layout Guidelines

For optimum performance, use 50-Ω transmission lines (100-Ω differential) for connecting the high speed inputs and outputs. The length of transmission lines should be kept as short as possible to reduce loss and pattern-dependent jitter.

If the single-ended mode of operation is being used (TXMODE = 1) then it is recommended to terminate the unused output with a 50-Ω resistor to VCC. Figure 54 shows a typical layout for the high speed inputs and outputs.

10.2 Layout Example

ONET1131EC Layout_SLLSEQ6.gif Figure 54. Board Layout