SLAS396D July   2003  – November 2016 MSP430FE423 , MSP430FE425 , MSP430FE427

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Signal Descriptions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Supply Current Into AVCC and DVCC Excluding External Current
    5. 5.5  Thermal Resistance Characteristics, PM Package (LQFP64)
    6. 5.6  Schmitt-Trigger Inputs − Ports (P1 and P2), RST/NMI, JTAG (TCK, TMS, TDI/TCLK,TDO/TDI)
    7. 5.7  Inputs P1.x, P2.x, TAx
    8. 5.8  Leakage Current − Ports (P1 and P2)
    9. 5.9  Outputs − Ports (P1 and P2)
    10. 5.10 Output Frequency
    11. 5.11 Typical Characteristics - Ports P1 and P2
    12. 5.12 Wake-up Time From LPM3
    13. 5.13 RAM
    14. 5.14 LCD
    15. 5.15 USART0
    16. 5.16 POR, BOR
    17. 5.17 SVS (Supply Voltage Supervisor and Monitor)
    18. 5.18 DCO
    19. 5.19 Crystal Oscillator, LFXT1 Oscillator
    20. 5.20 ESP430CE1, SD16 and ESP430 Power Supply and Operating Conditions
    21. 5.21 ESP430CE1, SD16 Input Range
    22. 5.22 ESP430CE1, SD16 Performance
    23. 5.23 ESP430CE1, SD16 Temperature Sensor
    24. 5.24 ESP430CE1, SD16 Built-in Voltage Reference
    25. 5.25 ESP430CE1, SD16 Reference Output Buffer
    26. 5.26 ESP430CE1, SD16 External Reference Input
    27. 5.27 ESP430CE1, Active Energy Measurement Test Conditions and Accuracy
    28. 5.28 ESP430CE1, Active Energy Measurement Test Conditions and Accuracy
    29. 5.29 ESP430CE1 Typical Characteristics (I1 SD16GAINx = 1)
    30. 5.30 ESP430CE1 Typical Characteristics (I1 SD16GAINx = 4)
    31. 5.31 ESP430CE1 Typical Characteristics (I1 SD16GAINx = 8)
    32. 5.32 ESP430CE1 Typical Characteristics (I1 SD16GAINx = 32)
    33. 5.33 Flash Memory
    34. 5.34 JTAG Interface
    35. 5.35 JTAG Fuse
  6. 6Detailed Description
    1. 6.1  CPU
    2. 6.2  Instruction Set
    3. 6.3  Operating Modes
    4. 6.4  Interrupt Vector Addresses
    5. 6.5  Special Function Registers
    6. 6.6  Memory Organization
    7. 6.7  Bootloader (BSL)
    8. 6.8  Flash Memory
    9. 6.9  Peripherals
      1. 6.9.1  Oscillator and System Clock
      2. 6.9.2  Brownout, Supply Voltage Supervisor (SVS)
      3. 6.9.3  Digital I/O
      4. 6.9.4  Basic Timer1
      5. 6.9.5  LCD Drive
      6. 6.9.6  Watchdog Timer (WDT+)
      7. 6.9.7  Timer_A3
      8. 6.9.8  USART0
      9. 6.9.9  ESP430CE1
      10. 6.9.10 Peripheral File Map
    10. 6.10 Input/Output Diagrams
      1. 6.10.1 Port P1 (P1.0 and P1.1) Input/Output With Schmitt Trigger
      2. 6.10.2 Port P1 (P1.2 to P1.7) Input/Output With Schmitt Trigger
      3. 6.10.3 Port P2 (P2.0 and P2.1) Input/Output With Schmitt Trigger
      4. 6.10.4 Port P2 (P2.2 to P2.5) Input/Output With Schmitt Trigger
      5. 6.10.5 Port P2 (P2.6 and P2.7) Unbonded GPIOs
      6. 6.10.6 JTAG Pins TMS, TCK, TDI/TCLK, TDO/TDI, Input/Output With Schmitt-Trigger or Output
      7. 6.10.7 JTAG Fuse Check Mode
  7. 7Device and Documentation Support
    1. 7.1  Getting Started and Next Steps
    2. 7.2  Device Nomenclature
    3. 7.3  Tools and Software
    4. 7.4  Documentation Support
    5. 7.5  Related Links
    6. 7.6  Community Resources
    7. 7.7  Trademarks
    8. 7.8  Electrostatic Discharge Caution
    9. 7.9  Export Control Notice
    10. 7.10 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

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2 Revision History

Changes from October 16, 2008 to November 14, 2016

  • Format and organization changes throughout document, including addition of section numberingGo
  • Added Section 3Go
  • Added Section 5 and moved all electrical and timing specifications to itGo
  • Added Section 5.2, ESD RatingsGo
  • Changed the MAX value of the I(LPM3) parameter at 85°C from 2.6 to 3.5 µA in Section 5.4, Supply Current Into AVCC and DVCC Excluding External CurrentGo
  • Added Section 5.5, Thermal Resistance Characteristics, PM Package (LQFP-64)Go
  • Changed all cases of "bootstrap loader" to "bootloader"Go
  • Changed the value of the Port/LCD column in Table 6-14, Port P1 (P1.2 to P1.7) Pin FunctionsGo
  • Changed the value of the Port/LCD column in Table 6-15, Port P2 (P2.0 and P2.1) Pin FunctionsGo
  • Added Section 7, Device and Documentation SupportGo
  • Added Section 8, Mechanical, Packaging, and Orderable InformationGo