8.3.1 Enable (EN)

A high input on the EN pin (V_EN ≥ V_IH) actives the device which turns the regulator to an ON state. A low input on the EN pin (V_EN ≤ V_IL) disables the device which turns the regulator to an OFF state. Operating with V_EN between the V_IL and the V_IH thresholds is not recommended as the device status cannot be assured. For self-bias applications where the EN function is not needed, connect the EN pin to the IN pin.

8.3.2 Regulated Output (OUT)

The OUT pin is the regulated output voltage based on the internally pre-programmed voltage. The output has current limitation. In the event that the regulator drops out of regulation due to low input voltage, the output tracks the input minus a drop based on the load current. There is no UVLO circuitry. Device behavior is undefined when V_IN is below the minimum operating input voltage of either 2.5 V, or V_OUT + 200 mV, whichever is greater.

8.3.3 Power Good (PG) Output

The PG pin is an open-drain output and can be pulled up to any 6 V, or lower rail through an external pullup resistor. The PG pin is high-impedance when V_OUT is greater than the PG trip high threshold (V_THH). If V_OUT is less than the PG trip low threshold (V_THL), the open-drain output turns on and pulls the PG output low. If output voltage monitoring is not needed, the PG pin can be left floating or connected to GND. The behavior of the power-good feature is not ensured when V_IN is less than 2.5 V.

8.3.4 PG Delay Time

The power-good delay times (t_ON, t_OFF) are defined as the time period from when V_OUT crosses either the PG high trip threshold voltage (V_THH), or the PG low trip threshold voltage (V_THL), to when the PG output changes to the appropriate state. The power-good delay times are set internally, and both are typically 10 µs. There is no external adjustment available to alter the delay times.

8.3.5 Current Limit

The fixed current limit (I_SC) of the LP3988 helps protect the regulator during output fault conditions. The maximum amount of current the device can source is typically 600 mA, and is largely independent of input and output voltage. For reliable operation, do not operate the device in current limit for extended periods of time. Depending on power dissipation, thermal resistance, and ambient temperature, operating at the current limit may activate the thermal shutdown circuitry.

8.3.6 Thermal Shutdown (T_SD)

Thermal shutdown (T_SD) protection disables the output when the junction temperature rises to approximately 160°C, This shutdown causes the device dissipation to go to zero, which allows the device to cool. When the device junction temperature cools to approximately 140°C, the output circuitry is automatically enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle ON and OFF. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. The thermal shutdown circuitry of the LP3988 has been designed to protect against temporary thermal overload conditions. The T_SD circuitry was not intended to replace proper heat-sinking. Continuously running the LP3988 device in T_SD may degrade device reliability and lifetime.

8.3.7 Fast Turnon Time

The LP3988 utilizes a speed up circuitry to ramp up the internal V_REF voltage to its final value to achieve a fast output turnon time.

8.4.1 Normal Operation

The device regulates to the nominal output voltage under the following conditions:

• The input voltage (V_IN ) is at least either 2.5 V, or V_OUT + 200 mV, whichever is greater.
• The enable voltage (V_EN) is at least 1.2 V (V_IH).
• The output current is no more than the maximum rated current of 150 mA.
• The device junction temperature (T_J) is no more than the maximum specified operating junction temperature.

8.4.2 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage (V_DO), but all other conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device (PMOS transistor), no longer controls the current through the LDO. Line or load transients while operating in dropout can result in large output voltage deviations.

8.4.3 Disabled

The device is disabled under the following conditions:

• V_EN is no more than 0.6 V (V_IL).
• T_J is greater than the thermal shutdown temperature.