SNVS087AE October   2000  – May 2015 LP3985


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Performance Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 No-Load Stability
      2. 7.3.2 On/Off Input Operation
      3. 7.3.3 Fast On-Time
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VOUT(TARGET) + 0.3 V ≤ VIN ≤ 6 V
      2. 7.4.2 Operation Using the EN Pin
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. External Capacitors
        2. Input Capacitor
        3. Output Capacitor
        4. Capacitor Characteristics
        5. Noise Bypass Capacitor
        6. Thermal Considerations
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 DSBGA Mounting
    4. 10.4 DSBGA Light Sensitivity
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information


机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)

8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LP3985 can provide 150-mA output current with 2.5-V to 6-V input. It is stable with a small 1-µF ±30% ceramic or high-quality tantalum output capacitor. The DSBGA requires the smallest possible PC board area – the total application circuit area can be less than 2 mm x 2.5 mm, a fraction of a 1206 case size. An optional external bypass capacitor reduces the output noise without slowing down the load transient response. Fast startup time is achieved by utilizing an internal power-on circuit that actively pre-charges the bypass capacitor. Typical output noise is 30 µVRMS at frequencies from 10 Hz to 100 kHz. Typical power supply rejection is 50 dB at 1 kHz.

8.2 Typical Application

LP3985 10136402.gifFigure 37. LP3985 Typical Application

8.2.1 Design Requirements

Input voltage 4.2 V, ±10% provided by the DC-DC converter switching at 1 MHz
Output voltage 3 V, ±5%
Output current 150 mA (maximum)
RMS noise, 10 Hz to100 kHz 30 μVRMS
PSRR at 1 kHz 50 dB

8.2.2 Detailed Design Procedure External Capacitors

Like any low-dropout regulator, the LP3985 requires external capacitors for regulator stability. The LP3985 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. Input Capacitor

An input capacitance of approximately 1 µF is required between the LP3985 input pin and ground (the amount of the capacitance may be increased without limit).

This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analog ground. A ceramic capacitor is recommended although a good quality tantalum or film capacitor may be used at the input.


Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be verified by the manufacturer to have a surge current rating sufficient for the application.

There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain within the operational range over the full range of temperature and operating conditions. Output Capacitor

Correct selection of the output capacitor is important to ensure stable operation in the intended application.

The output capacitor must meet all the requirements specified in the recommended capacitor table over all conditions in the application. These conditions include DC-bias, frequency and temperature. Unstable operation will result if the capacitance drops below the minimum specified value. (See the next section Capacitor Characteristics).

The LP3985 is designed specifically to work with very small ceramic output capacitors. A 1-µF ceramic capacitor (dialectric type X7R) with ESR between 5 mΩ to 500 mΩ is suitable in the LP3985 application circuit. X5R capacitors may be used but have a narrower temperature range. With these and other capacitor types (Y5V, Z6U) that may be used, selection is dependant on the range of operating conditions and temperature range for that application. (see Capacitor Characteristics ).

It may also be possible to use tantalum or film capacitors at the output, but these are not as attractive for reasons of size and cost (see Capacitor Characteristics).

It is also recommended that the output capacitor be placed within 1 cm from the output pin and returned to a clean ground line. Capacitor Characteristics

The LP3985 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer: for capacitance values in the range of 1 µF to 4.7 µF, ceramic capacitors are the smallest, least expensive, and have the lowest ESR values (which makes them best for eliminating high frequency noise). The ESR of a typical 1-µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability by the LP3985.

For both input and output capacitors careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly dependant on the conditions of operation and capacitor type.

In particular the output capacitor selection should take account of all the capacitor parameters to ensure that the specification is met within the application. Capacitance value can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size with smaller sizes giving poorer performance figures in general. As an example Figure 38 shows a typical graph showing a comparison of capacitor case sizes in a Capacitance vs. DC Bias plot. As shown in the graph, as a result of the DC Bias condition the capacitance value may drop below the minimum capacitance value given in the recommended capacitor table (0.7 µF in this case). Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor manufacturers' specifications for the nominal value capacitor are consulted for all conditions as some capacitor sizes (for example, 0402) may not be suitable in the actual application.

LP3985 30017828.gifFigure 38. Graph Showing A Typical Variation In Capacitance vs DC Bias

The ceramic capacitor's capacitance can vary with temperature. The capacitor type X7R, which operates over a temperature range of −55°C to 125°C, will only vary the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of −55°C to 85°C. Most large value ceramic capacitors (around 2.2 µF) are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature goes from 25°C to 85°C. Therefore X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25°C.

Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1-µF to 4.7-µF range.

Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed. Noise Bypass Capacitor

Connecting a 0.01-µF capacitor between the CBYPASS pin and ground significantly reduces noise on the regulator output. This cap is connected directly to a high impedance node in the band gap reference circuit. Any significant loading on this node will cause a change on the regulated output voltage. For this reason, DC leakage current through this pin must be kept as low as possible for best output voltage accuracy.

The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High-quality ceramic capacitors with either NPO or COG dielectric typically have very low leakage. Polypropolene and polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low leakage current.

Unlike many other LDOs, addition of a noise reduction capacitor does not effect the load transient response of the device. Thermal Considerations


Due to the limited power dissipation characteristics of the available SOT-23 (DBV) and DSBGA (YZR) packages, all possible combinations of output current (IOUT), input voltage (VIN), output voltage (VOUT), and ambient temperatures (TA) cannot be ensured.

Power dissipation, PD is calculated from the following formula: PD = ((VIN – VOUT) × IOUT) .

The LP3985 regulator has internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the recommended maximum operating junction temperature is 125°C. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered.

For surface-mount devices, heat sinking is accomplished by using the heat-spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. Example: Given an output voltage of 3.3 V, an input voltage range of 4 V to 6 V, a maximum output current of 100 mA, and a maximum ambient temperature of 50°C, what is the maximum operating junction temperature? The power dissipated by the device is found using the formula:

Equation 1. LP3985 pwrdiseq.gif


  • IOUT(MAX) = 100 mA
  • VIN(MAX) = 6 V
  • VOUT = 3.3 V

For example, PD(MAX) = ((6 V – 3.3 V) × 100 mA ) = 0.27 W.

Using the 5-pin SOT-23 (DBV) package, the LP3985 junction-to-ambient thermal resistance (RθJA) has a rating of 220°C/W using the standard JEDEC JESD51-7 PCB (High-K) circuit board. The junction temperature rise above ambient is found using the formula:

       TRISE = PD(MAX) × RθJA;

for example, TJ(MAX) = 50°C + 59.4°C = 109.4°C.

8.2.3 Application Curves

LP3985 10136415.png
VIN = 4.2 V
Figure 39. Start-up Time
LP3985 10136454.png
VIN = 4.2 V
Figure 40. Enable Response