When the input voltage is close to the output voltage, the regulator will operate at very large duty cycles. Normal time delays of the internal circuits prevents the attainment of controlled duty cycles near 100%. In this condition, the LMZ20501 will skip switching cycles to maintain regulation with the highest possible input-to-output ratio. Some increase in output voltage ripple can appear as the regulator skips cycles. As the input voltage gets closer to the output voltage, the regulator will eventually reach 100% duty cycle, with the high side switch turned on. The output will then follow the input voltage minus the drop across the high-side switch and inductor resistance. Figure 7-5 and Figure 7-6 show typical dropout behavior for output voltages of 2.5 V and 3.3 V.

Since the internal gate drive levels of the LMZ20501 are dependent on input voltage, the R_dson of the power FETs will increase at low input voltages. This will result in degraded efficiency at input voltages below approximately 2.9 V. Also, combinations of low input voltage and high output voltage increase the effective switch duty cycle, which can result in increased output voltage ripple.

Figure 7-5 Typical Dropout Behavior, V_OUT = 2.5 V

Figure 7-6 Typical Dropout Behavior, V_OUT = 3.3 V