ZHCS551L January   2010  – April 2019 LMZ10503

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用电路
      2.      效率 (VOUT = 3.3V)
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Enable and UVLO
      3. 7.3.3 Soft-Start
      4. 7.3.4 Soft-Start Capacitor
      5. 7.3.5 Tracking
      6. 7.3.6 Tracking - Equal Soft-Start Time
      7. 7.3.7 Tracking - Equal Slew Rates
      8. 7.3.8 Current Limit
      9. 7.3.9 Overtemperature Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Prebias Start-Up Capability
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Selection
        3. 8.2.2.3 Output Capacitor Selection
          1. 8.2.2.3.1 Output Voltage Setting
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Application Schematic for 3.3-V to 5-V Input and 2.5-V Output With Optimized Ripple and Transient Response
      2. 8.3.2 Application Schematic for 3.3-V to 5-V Input and 2.5-V Output
      3. 8.3.3 EMI Tested Schematic for 2.5-V Output Based on 3.3-V to 5-V Input
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Estimate Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方产品免责声明
      2. 11.1.2 开发支持
        1. 11.1.2.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2.2.2 Input Capacitor Selection

A 22-µF or 47-µF, high-quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum input voltage is typically sufficient. The input capacitor must be placed as close as possible to the VIN pin and GND exposed pad to substantially eliminate the parasitic effects of any stray inductance or resistance on the PCB and supply lines.

Neglecting capacitor equivalent series resistance (ESR), the resultant input capacitor AC ripple voltage is a triangular waveform. The minimum input capacitance for a given peak-to-peak value (ΔVIN) of VIN is specified as follows:

Equation 7. LMZ10503 eq_8_SNVS610.gif

where

Equation 8. LMZ10503 eq_9_SNVS610.gif

If ΔVIN is 1% of VIN, this equals to 50 mV and fSW = 1 MHz.

Equation 9. LMZ10503 eq_1_SNVS668.gif

A second criteria before finalizing the Cin bypass capacitor is the RMS current capability. The necessary RMS current rating of the input capacitor to a buck regulator can be estimated by:

Equation 10. LMZ10503 eq_11_SNVS610.gif
Equation 11. LMZ10503 eq_2_SNVS668.gif

With this high AC current present in the input capacitor, the RMS current rating becomes an important parameter. The maximum input capacitor ripple voltage and RMS current occur at 50% duty cycle. Select an input capacitor rated for at least the maximum calculated ICin(RMS).

Additional bulk capacitance with higher ESR may be required to damp any resonance effects of the input capacitance and parasitic inductance.