ZHCSCA9A March 2014 – April 2015 LMP92066
PRODUCTION DATA.
The device rails VIO, VDD, and VDDB (VSSB in GaN mode) should be supplied from a well-regulated power supply capable of sourcing at least 50 mA. The required supply levels are shown in the Specifications tables of this document. Along with ceramic bypass capacitors, additional bulk capacitance is recommended on the VDD node. The function of this bulk capacitance is to provide the momentary increases in the supply current requirements due to the EEPROM activity. An electrolytic capacitor with a value of 10 μF to 47 μF is a typical choice.
Figure 51 shows the transient behavior of IVDD due to the EEPROM BURN operation. VSDA trace activity is used as the trigger. The triggering event is the BURN command sent via the I2C interface. During the BURN the IVDD increases to almost 4 mA for 125 ms. The 10-mA peaking in IVDD is due to the TRANSFER of newly stored data from EEPROM back to the operating memory – this is part of the internal error detection and correction process.
IVDD = 2mA/div | VSDA = 5V/div | |
The transfer of data, from the EEPROM to the operating memory, results in the temporary increase in supply current IVDD. The total IVDD increases to about 10 mA for the duration of the TRANFER operation, typically 200 µs. Given the infrequent occurrence, and the short duration, the increased IVDD can be easily supplied by the external bulk capacitors; that is, this does not represent an additional burden to the system power supply. The typical IVDD transient during TRANSFER is shown in Figure 52. The triggering event is the TRANSFER command issued via the I2C interface.
IVDD = 2mA/div | VSDA = 5V/div | |
The TRANSFER operation occurs due to the following: