ZHCSLH1A September   2021  – December 2021 LMH5485-SP

ADVANCE INFORMATION  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: VS+ – VS– = 5 V
    6. 7.6  Electrical Characteristics: VS+ – VS– = 3 V
    7. 7.7  Quality Conformance Inspection
    8. 7.8  Typical Characteristics: 5 V Single Supply
    9. 7.9  Typical Characteristics: 3 V Single Supply
    10. 7.10 Typical Characteristics: 3 V to 5 V Supply Range
  8. Parameter Measurement Information
    1. 8.1 Example Characterization Circuits
  9. Detailed Description
    1. 9.1 Overview
      1. 9.1.1 Terminology and Application Assumptions
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Differential I/O
      2. 9.3.2 Power-Down Control Pin (PD)
        1. 9.3.2.1 Operating the Power Shutdown Feature
      3. 9.3.3 Input Overdrive Operation
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation from Single-Ended Sources to Differential Outputs
        1. 9.4.1.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.4.1.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.4.1.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
        4. 9.4.1.4 Input Impedance for the Single-Ended to Differential FDA Configuration
      2. 9.4.2 Differential-Input to Differential-Output Operation
        1. 9.4.2.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tube Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • HKX|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics: 3 V to 5 V Supply Range

at Vs+ = 3 V and 5 V, Vs– = GND, Vocm is open, 50 Ω single-ended input to differential output, gain = 2 V/V, Rload = 500 Ω, and TA ≈ 25°C (unless otherwise noted)

Figure 7-9 Main Amplifier Differential Open-Loop Gain and Phase vs Frequency
Figure 7-11 Input Spot Noise Over Frequency
GUID-4840AAC5-E731-42D5-96CF-7DAEBF86CF0D-low.gif
Common-mode in to differential out, gain of 2 simulation
Figure 7-13 CMRR Over Frequency
GUID-E5E05F62-AE81-4EA4-9D51-E9101BD0B2FA-low.gif
Vocm input either driven to mid-supply by low impedance source, or allowed to float and default to mid-supply
Figure 7-15 Output Common-Mode Noise
GUID-AA10FD97-CA54-4E74-AEC4-AB2A0954C182-low.gif
Single-ended to differential gain of 2 (see Figure 8-1), PSRR for negative supply to differential output (1-kHz simulation)
Figure 7-17 –PSRR vs Vocm Approaching Vs–
GUID-20210623-CA0I-M9DC-QV5Q-6NCPM4KQK83G-low.png
Total of 4618 units for each supply. For Vs = 5 V: μ = -35.1 μV, σ = 38.9 μV
Figure 7-19 Input Offset Voltage
GUID-50DBF8C4-01C0-4F43-BEAE-2029AE719632-low.gif
Maximum differential output swing, Vocm at mid-supply
Figure 7-21 Maximum Vopp vs Rload
Vocm input floating. Total of 4618 units for each supply.
For Vs = 5 V: μ = 6.8 mV, σ = 3.9 mV
Figure 7-23 Common-Mode Output Offset from Vs+ / 2 Default Value
GUID-F41D9B85-1017-4F9D-BFD9-B4151ED4CFD5-low.gif
10 MHz, 1 Vpp input single to differential gain of 2,
see Figure 8-3
Figure 7-25 PD Turn On Waveform
GUID-47722D23-6EAB-48F5-A4B5-036757B49D86-low.gif
Single-ended input to differential output, simulated differential output impedance, see Figure 8-1
Figure 7-10 Closed-Loop Output Impedance
GUID-2057E08F-E5F4-4F2F-9152-89DF04366FC3-low.gif
Single-ended input to differential output, gain of 2 (see Figure 8-1), simulated with 1% resistor, worst-case mismatch
Figure 7-12 Output Balance Error Over Frequency
GUID-8ADBBD2A-D860-4265-B9BC-3D1EEE887A63-low.gif
Single-ended to differential, gain of 2 (see Figure 8-1) PSRR simulated to differential output
Figure 7-14 PSRR Over Frequency
GUID-8A12B92A-0981-4D3A-A522-DDDC363F16EE-low.gif
Average Vocm output offset of 37 units, Standard deviation
< 2.5 mV, see Figure 8-3
Figure 7-16 Vocm Offset vs Vocm Setting
GUID-28170C09-59A8-4063-8FF3-921F1531AB81-low.gif
Single-ended to differential gain of 2 (see Figure 8-1), PSRR for positive supply to differential output (1-kHz simulation)
Figure 7-18 +PSRR vs Vocm Approaching Vs+
Total of 4618 units for each supply. For Vs = 5 V: μ = 16.7 nA, σ = 62.3 nA
Figure 7-20 Input Offset Current
GUID-FDFE4C52-90D4-4F51-A8B7-D19D07EEC500-low.gif
Figure 7-22 Supply Current vs PD Voltage
Total of 4618 units for each supply. For Vs = 5 V: μ = 0.3 mV, σ = 1.3 mV
Figure 7-24 Common-Mode Output Offset from Driven Vocm
GUID-1E6E5556-F37A-4415-A2D1-591FCA5A5151-low.gif
10 MHz, 1 VPP input single to differential gain of 2,
see Figure 8-3
Figure 7-26 PD Turn Off Waveform