SNLS308G April   2009  – June 2015 LMH0384

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 AC Electrical Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Block Description
      2. 7.3.2 Mute Reference (MUTEREF)
      3. 7.3.3 Carrier Detect (CD) and Mute
      4. 7.3.4 Auto Sleep
      5. 7.3.5 Input Interfacing
      6. 7.3.6 Output Interfacing
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 SPI Write
      2. 7.5.2 SPI Read
      3. 7.5.3 Output Driver Adjustments
      4. 7.5.4 Launch Amplitude Optimization
      5. 7.5.5 Cable Length Indicator (CLI)
      6. 7.5.6 Application of CLI: Extending 3G Reach
      7. 7.5.7 Explanation of Extended 3G Reach Mode State Machine ()
    6. 7.6 Register Maps
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Replacing the LMH0344
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Dos and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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10 Layout

10.1 Layout Guidelines

For information on layout and soldering of the WQFN package, please refer to the following application note: AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

The ST 424, 292, and 259 standards have stringent requirements for the input return loss of receivers, which essentially specify how closely the input must resemble a 75-Ω network. Any non-idealities in the network between the BNC and the equalizer will degrade the input return loss. Take care to minimize impedance discontinuities between the BNC and the equalizer to ensure that the characteristic impedance of this trace is 75 Ω.

Please consider the following PCB recommendations:

  • Use surface-mount components, and use the smallest components available. In addition, use the smallest size component pads.
  • Select trace widths that minimize the impedance mismatch between the BNC and the equalizer.
  • Select a board stack up that supports both 75-Ω single-ended traces and 100-Ω loosely-coupled differential traces.
  • Place return loss components closest to the equalizer input pins.
  • Maintain symmetry on the complementary signals.
  • Route 100-Ω traces uniformly (keep trace widths and trace spacing uniform along the trace).
  • Avoid sharp bends in the signal path; use 45° or radial bends.
  • Place bypass capacitors close to each power pin, and use the shortest path to connect equalizer power and ground pins to the respective power or ground planes.

10.2 Layout Example

Figure 15 and Figure 16 demonstrate the LMH0384EVM PCB layout. Ground and supply relief under the return loss passive components and pads reduces parasitic - improving return loss performance. Note 5 vias without solder paste are located between 4 squares solder paste mainly for thermal as well as to improve soldering during board assembly.

LMH0384 layout_ex_02_snls233.pngFigure 15. LMH0384EVM Top Etch Layout Example
LMH0384 layout_ex_01_snls233.pngFigure 16. LMH384EVM Top Solder Paste Mask