SNIS146B March   2007  – October 2017 LM95214

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Temperature-to-Digital Converter
    6. 6.6 Logic Electrical Characteristics: Digital DC Characteristics
    7. 6.7 Switching Characteristics: SMBus Digital
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Conversion Sequence
      2. 7.3.2 Power-On-Default States
      3. 7.3.3 SMBus Interface
      4. 7.3.4 Temperature Conversion Sequence
        1. 7.3.4.1 Digital Filter
      5. 7.3.5 Fault Queue
      6. 7.3.6 Temperature Data Format
      7. 7.3.7 SMBDAT Open-Drain Output
      8. 7.3.8 TCRIT1, TCRIT2, and TCRIT3 Outputs
      9. 7.3.9 TCRIT Limits and TCRIT Outputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Diode Fault Detection
      2. 7.4.2 Communicating With the LM95214
      3. 7.4.3 Serial Interface Reset
      4. 7.4.4 One-Shot Conversion
    5. 7.5 Register Maps
      1. 7.5.1 LM95214 Registers
        1. 7.5.1.1 Value Registers
          1. 7.5.1.1.1 Local Value Registers
          2. 7.5.1.1.2 Remote Temperature Value Registers With Signed Format
          3. 7.5.1.1.3 Remote Temperature Value Registers With Unsigned Format
        2. 7.5.1.2 Diode Configuration Register
          1. 7.5.1.2.1 Remote 1-4 Offset
        3. 7.5.1.3 Configuration Registers
          1. 7.5.1.3.1 Main Configuration Register
          2. 7.5.1.3.2 Conversion Rate Register
          3. 7.5.1.3.3 Channel Conversion Enable
          4. 7.5.1.3.4 Filter Setting
          5. 7.5.1.3.5 1-Shot
        4. 7.5.1.4 Status Registers
          1. 7.5.1.4.1 Common Status Register
          2. 7.5.1.4.2 Status 1 Register (Diode Fault)
          3. 7.5.1.4.3 Status 2 (TCRIT1)
          4. 7.5.1.4.4 Status 3 (TCRIT2)
          5. 7.5.1.4.5 Status 4 (TCRIT3)
        5. 7.5.1.5 Mask Registers
          1. 7.5.1.5.1 TCRIT1 Mask Register
          2. 7.5.1.5.2 TCRIT2 Mask Registers
          3. 7.5.1.5.3 TCRIT3 Mask Register
        6. 7.5.1.6 Limit Registers
          1. 7.5.1.6.1 Local Limit Register
          2. 7.5.1.6.2 Remote Limit Registers
          3. 7.5.1.6.3 Common Tcrit Hysteresis Register
        7. 7.5.1.7 Identification Registers
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
    3. 8.3 Diode Non-Ideality
      1. 8.3.1 Diode Non-Ideality Factor Effect on Accuracy
      2. 8.3.2 Calculating Total System Accuracy
      3. 8.3.3 Compensating for Different Non-Ideality
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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Layout

Layout Guidelines

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced on traces running between the remote temperature diode sensor and the LM95214 can cause temperature conversion errors. Keep in mind that the signal level the LM95214 is trying to measure is in microvolts. The following guidelines must be followed:

  1. VDD must be bypassed with a 0.1-µF capacitor in parallel with 100 pF. The 100-pF capacitor must be placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 µF must be in the near vicinity of the LM95214.
  2. Ti recommends the use of a 100-pF diode bypass capacitor to filter high-frequency noise, but it may not be necessary. Make sure the traces to the 100-pF capacitor are matched. Place the filter capacitors close to the LM95214 pins.
  3. Ideally, the LM95214 must be placed within 10 cm of the Processor diode pins with the traces being as straight, short and identical as possible. Trace resistance of 1 Ω can cause as much as 0.62°C of error. This error can be compensated by using simple software offset compensation.
  4. Diode traces must be surrounded by a GND guard ring to either side, above and below if possible. This GND guard must not be between the D+ and D− lines. In the event that noise does couple to the diode lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.
  5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.
  6. Avoid running diode traces close to or parallel to high-speed digital and bus lines. Diode traces must be kept at least 2 cm apart from the high-speed digital traces.
  7. If it is necessary to cross high-speed digital traces, the diode traces and the high-speed digital traces must cross at a 90 degree angle.
  8. The ideal place to connect the LM95214's GND pin is as close as possible to the Processors GND associated with the sense diode.
  9. Leakage current between D+ and GND and between D+ and D− must be kept to a minimum. Thirteen nano-amperes of leakage can cause as much as 0.2°C of error in the diode temperature reading. Keeping the printed-circuit board as clean as possible will minimize leakage current.

Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV below GND, may prevent successful SMBus communication with the LM95214. SMBus no acknowledge is the most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of communication is rather low (100 kHz maximum), care still needs to be taken to ensure proper termination within a system with multiple parts on the bus and long printed-circuit board traces. An RC lowpass filter with a 3-dB corner frequency of about 40 MHz is included on the LM95214's SMBCLK input. Additional resistance can be added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high-speed data communications cross at right angles to the SMBDAT and SMBCLK lines.

Layout Example

LM95214 30006117.png Figure 27. Ideal Diode Trace Layout