SNOS469K April   2000  – January 2017 LM8261

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
    7. 5.7 Old Versus New Die Comparison
  7. 6Application and Implementation
    1. 6.1 Driving Capacitive Loads
    2. 6.2 Low-Side Current Measurement
    3. 6.3 Output Short Circuit Current and Dissipation Issues
    4. 6.4 Other Application Hints
    5. 6.5 Power Supply Recommendations
    6. 6.6 Layout
      1. 6.6.1 Layout Guidelines
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

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Output Short Circuit Current and Dissipation Issues

The LM8261 output stage is designed for maximum output current capability. Even though momentary output shorts to ground and either supply can be tolerated at all operating voltages, longer lasting short conditions can cause the junction temperature to rise beyond the absolute maximum rating of the device, especially at higher supply voltage conditions.

With the Op Amp tied to a load, the device power dissipation consists of the quiescent power due to the supply current flow into the device, in addition to power dissipation due to the load current. The load portion of the power itself could include an average value (due to a DC load current) and an AC component. DC load current would flow if there is an output voltage offset, or the output AC average current is non-zero, or if the Op Amp operates in a single supply application where the output is maintained somewhere in the range of linear operation. Therefore:

Equation 1. PTOTAL = PQ + PDC + PAC

Op Amp Quiescent Power Dissipation:

Equation 2. PQ = IS · VS

DC Load Power:

Equation 3. PDC = IO · (VR - VO)

AC Load Power:

Equation 4. PAC = (outlined in table below)

where

  • IS is Supply Current
  • VS is Total Supply Voltage (V+ - V−)
  • IO is Average Load Current
  • VO is Average Output Voltage
  • VR is V+ for sourcing and V− for sinking current

Table 6-1 shows the maximum AC component of the load power dissipated by the Op Amp for standard Sinusoidal, Triangular, and Square Waveforms:

Table 6-1 Normalized AC Power Dissipated in the Output Stage for Standard Waveforms
PAC (W.Ω/V2)
SinusoidalTriangularSquare
50.7 x 10−346.9 x 10−362.5 x 10−3

The table entries are normalized to VS2/ RL. To calculate the AC load current component of power dissipation, simply multiply the table entry corresponding to the output waveform by the factor VS2/ RL. For example, with ±15 V supplies, a 600-Ω load, and triangular waveform power dissipation in the output stage is calculated as:

Equation 5. PAC= (46.9 x 10−3) · [302/600]= 70.4 mW