本资源的原文使用英文撰写。 为方便起见,TI 提供了译文;由于翻译过程中可能使用了自动化工具,TI 不保证译文的准确性。 为确认准确性,请务必访问 ti.com 参考最新的英文版本(控制文档)。
LM5169 和 LM5168 同步降压转换器用于在宽输入电压范围内进行调节,从而更大限度地减少对外部浪涌抑制元件的需求。50ns 的最短可控导通时间有助于实现较大的降压比,支持从 48V 标称输入到低电压轨的直接降压转换,从而降低系统的复杂性并减少解决方案成本。LM516x 在输入电压突降至 6V 时能够根据需要以接近 100% 的占空比工作,因而是宽输入电源电压范围工业应用和高电芯数电池包应用的理想之选。
凭借集成式高侧和低侧功率 MOSFET,LM5169 可提供高达 0.65A 的输出电流,LM5168 可提供高达 0.3A 的输出电流。恒定导通时间 (COT) 控制架构可提供几乎恒定的开关频率,具有出色的负载和线路瞬态响应。LM516x 能够以 FPWM 或自动模式运行。FPWM 模式在整个负载范围内实现强制 CCM 运行,支持隔离式 Fly-Buck 转换器应用。自动模式可实现超低 IQ 和二极管仿真模式运行,从而在轻负载下实现高效率。
器件型号(3) | 封装(1) | 封装尺寸(2) |
---|---|---|
LM5169 | DDA(HSOIC,8) | 4.9mm × 6mm |
NGU(WSON,8) | 4.00mm × 4.00mm | |
LM5168 | DDA(HSOIC,8) | 4.9mm × 6mm |
NGU(WSON,8) | 4.00mm × 4.00mm |
DEVICE NUMBER | PACKAGE | DESCRIPTION | OUTPUT CURRENT | LIGHT LOAD MODE | CURRENT LIMIT |
---|---|---|---|---|---|
LM5168PDDAR | DDA (HSOIC, 8) | 0.3 A, buck, AUTO, no-hiccup | 0.3 A | PFM | 0.42 A, no-hiccup |
LM5168FDDAR | 0.3 A, buck, FPWM, hiccup | FPWM | 0.42 A, hiccup | ||
LM5169PDDAR | 0.65 A, buck, AUTO, hiccup | 0.65 A | PFM | 0.84 A, hiccup | |
LM5169FDDAR | 0.65 A, buck, FPWM, hiccup | FPWM | 0.84 A, hiccup | ||
LM5168PNGUR | NGU (WSON, 8) | 0.3 A, buck, AUTO, no-hiccup | 0.3 A | PFM | 0.42 A, no-hiccup |
LM5168FNGUR | 0.3 A, buck, FPWM, hiccup | FPWM | 0.42 A, hiccup | ||
LM5169PNGUR | 0.65 A, buck, AUTO, hiccup | 0.65 A | PFM | 0.84 A, hiccup | |
LM5169FNGUR | 0.65 A, buck, FPWM, hiccup | FPWM | 0.84 A, hiccup |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | GND | G | Ground connection for internal circuits |
2 | VIN | P/I | Regulator supply input pin to the high-side power MOSFET and internal bias regulator. Connect directly to the input supply of the buck converter with short, low impedance paths. |
3 | EN/UVLO | I | Precision enable and undervoltage lockout (UVLO) programming pin. If the EN/UVLO rising voltage is below 1.1 V, the converter is in shutdown mode with all functions disabled. If the UVLO voltage is greater than 1.1 V and below 1.5 V, the converter is in standby mode with the internal VCC regulator operational and no switching. If the EN/UVLO voltage is above 1.5 V, the start-up sequence begins. |
4 | RT | I | On-time programming pin. A resistor between this pin and GND sets the buck switch on time. |
5 | FB | I | Feedback input of voltage regulation comparator |
6 | PGOOD | O | Power-good indicator. This pin is an open-drain output pin. Connect to a source voltage through an external pullup resistor between 10 kΩ to 100 kΩ. Connect to GND if the PGOOD feature is not needed. |
7 | BST | P/I | Bootstrap gate-drive supply. Required to connect a high-quality 2.2-nF X7R ceramic capacitor between BST and SW to bias the internal high-side gate driver. |
8 | SW | P | Switching node that is internally connected to the source of the high-side NMOS buck switch and the drain of the low-side NMOS synchronous rectifier. Connect to the switching node of the power inductor. |
— | EP | — | Exposed pad of the package. No internal electrical connection. Solder the EP to the GND pin and connect to a large copper plane to reduce thermal resistance. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Pin voltage | VIN | –0.3 | 120 | V |
SW | –1.5 | 120 | ||
SW, transient < 20 ns | –3 | |||
BST | –0.3 | 125.5 | ||
BST – SW | –0.3 | 5.5 | ||
EN | –0.3 | 120 | ||
FB | –0.3 | 5.5 | ||
RT | –0.3 | 5.5 | ||
PGOOD | –0.3 | 14 | ||
Bootstrap Capacitor(3) | External BST to SW capacitance | 2.5 | nF | |
TJ | Operating junction temperature | –40 | 150 | °C |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) | ±2000 | V |
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002 (2) | ±500 |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VIN | Pin voltage | VIN | 6 | 115 | V | |
VEN | Pin voltage | EN | 115 | V | ||
IOUT | Output current range | LM5169 | 0.65 | A | ||
LM5168 | 0.3 | A | ||||
CBST | External BST to SW capacitance |
FPWM Mode | 2.2 | nF | ||
FSW | Switching frequency | 100 | 1000 | kHz |
THERMAL METRIC(1) | LM516x | LM516x | UNIT | |
---|---|---|---|---|
DDA (SOIC) | NGU (WSON) | |||
8 PINS | 8 PINS | |||
RθJA(EVM) | Junction-to-ambient thermal resistance for EVM(2) | 22 | 15.8 | °C/W |
RθJA | Junction-to-ambient thermal resistance | 38.9 | 41.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 51.7 | 29.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 2.9 | 0.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 14.1 | 16.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 14.1 | 16.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.3 | 4.3 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY | ||||||
IQ(VIN) | VIN quiescent current | VEN = 2.5 V, PWM Operation | 420 | 880 | µA | |
VEN = 2.5 V, PFM Operation | 10 | 25 | µA | |||
IQ(STANDBY) | VIN standby current - LDO only | VEN = 1.25 V | 17 | 35 | µA | |
ISD(VIN) | VIN shutdown supply current | VEN = 0 V, Tj=25°C | 3 | 6 | µA | |
ENABLE | ||||||
VEN(R) | EN voltage rising threshold | EN rising, enable switching | 1.45 | 1.5 | 1.55 | V |
VEN(F) | EN voltage falling threshold | EN falling, disable switching | 1.35 | 1.4 | 1.44 | V |
VSD(R) | EN standby rising threshold | EN rising, enable internal LDO, no switching. | 1.1 | V | ||
VSD(F) | EN standby falling threshold | EN falling, disable internal LDO. | 0.45 | V | ||
REFERENCE VOLTAGE | ||||||
VFB | FB voltage | VFB falling | 1.181 | 1.2 | 1.218 | V |
STARTUP | ||||||
tSS | Internal fixed soft-start time | 1.75 | 3 | 4.75 | ms | |
POWER STAGE | ||||||
RDSON(HS) | High-side MOSFET on-resistance | ISW = –100 mA | 1.91 | Ω | ||
RDSON(LS) | Low-side MOSFET on-resistance | ISW = 100 mA | 0.74 | Ω | ||
tON(min) | Minimum ON pulse width | 50 | ns | |||
tON(1) | On-time1 | VVIN = 6 V, RRT = 75 kΩ | 5000 | ns | ||
tON(2) | On-time2 | VVIN = 6 V, RRT = 25 kΩ | 1650 | ns | ||
tON(3) | On-time3 | VVIN = 12 V, RRT = 75 kΩ | 2550 | ns | ||
tON(4) | On-time4 | VVIN = 12 V, RRT = 25 kΩ | 830 | ns | ||
tOFF(min) | Minimum OFF pulse width | 50 | ns | |||
BOOT CIRCUIT | ||||||
VBOOT-SW(UV_R) | BOOT-SW UVLO rising threshold | VBOOT-SW rising | 2.6 | 3.4 | V | |
OVERCURRENT PROTECTION | ||||||
IHS_PK(OC) | High-side peak current limit | LM5168 | 0.356 | 0.42 | 0.484 | A |
LM5169 | 0.71 | 0.84 | 0.94 | A | ||
ILS_PK(OC) | Low-side peak current limit | LM5168 | 0.356 | 0.42 | 0.484 | A |
LM5169 | 0.71 | 0.84 | 0.94 | A | ||
IDELTA(OC) | Min of IHS_PK(OC) or ILS_PK(OC) minus ILS_V(OC) | LM5168 | 0.084 | A | ||
LM5169 | 0.168 | A | ||||
ILS(NOC) | Low-side negative current limit | LM5169 | 1.05 | 1.5 | 1.90 | A |
LM5168 | 0.4 | 0.75 | 1.1 | A | ||
ILS_V(OC) | Low-side valley current limit | LM5169 Low-side valley current limit on LS FET | 0.569 | 0.672 | 0.775 | A |
LM5168 Low-side valley current limit on LS FET | 0.27 | 0.336 | 0.42 | A | ||
IZC | Zero-cross detection current threshold | 0 | A | |||
TW | Hiccup time before re-start | 64 | ms | |||
POWER GOOD | ||||||
VPGTH | Power Good threshold | FB falling, PG high to low | 1.055 | 1.08 | 1.1 | V |
FB rising, PG low to high | 1.105 | 1.14 | 1.175 | V | ||
RPG | Power Good threshold | VFB = 1 V | 7 | Ω | ||
THERMAL SHUTDOWN | ||||||
TJ(SD) | Thermal shutdown threshold (1) | Temperature rising | 175 | °C | ||
TJ(HYS) | Thermal shutdown hysteresis (1) | 10 | °C |
The LM5169 and LM5168 are easy-to-use, ultra-low IQ constant on-time (COT) synchronous step-down buck regulators. With integrated high-side and low-side power MOSFETs, the LM516x is a low-cost, highly efficient, buck converter that operates from a wide input voltage of 6 V to 120 V absolute maximum, delivering up to 0.65-A or 0.3-A DC load current. The LM516x is available in an 8-pin SO PowerPAD integrated circuit package with 1.27-mm pin pitch for adequate spacing in high-voltage applications. There is also a smaller 8-pin WSON package option available to help achieve a compact design. This constant on-time (COT) converter is an excellent choice for low-noise, high-current, and fast load transient requirements, operating with a predictive on-time switching pulse. Over the input voltage range, input voltage feed-forward is employed to achieve a quasi-fixed switching frequency. A controllable on time as low as 50 ns permits high step-down ratios and a minimum forced off time of 50 ns provides extremely high duty cycles. This feature enables fixed frequency operation as VIN drops close to VOUT. After the forced off time of 50 ns is reached, the device enters frequency fold-back operation to maintain a constant output voltage. The LM516x implements a smart peak and valley current limit detection circuit to make sure of robust protection during output short circuit conditions. Control loop compensation is not required for this regulator, reducing design time and external component count.
The LM5169 and LM5168 are pre-programmed to operate in auto mode or FPWM mode. When configured to operate in auto mode, at light loads, the device transitions into an ultra-low IQ mode to maintain high efficiency and prevent draining battery cells connected to the input when the system is in standby. When configured in FPWM mode, at light loads, the device maintains CCM operation, enabling Fly-Buck converter operation. The Fly-Buck converter configuration can be used to generate both a non-isolated primary output and an isolated secondary output.
The LM5169 and LM5168 incorporates additional features for comprehensive system requirements, including an open-drain power-good circuit for the following:
The LM5169 and LM5168 support a wide range of end equipment requiring a regulated output from a high input supply where the transient voltage deviates from the DC level. Examples of such end equipment systems are the following:
The pin arrangement is designed for a simple layout that requires only a few external components.