SNVS316H September   2004  – December 2014 LM2736

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Overvoltage Protection
      2. 7.3.2 Undervoltage Lockout
      3. 7.3.3 Current Limit
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Pin / Shutdown Mode
      2. 7.4.2 Soft-Start
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Boost Function
    2. 8.2 Typical Applications
      1. 8.2.1  LM2736X (1.6 MHz) VBOOST Derived from VIN 5 V to 1.5 V / 750 mA
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Input Capacitor
          3. 8.2.1.2.3 Output Capacitor
          4. 8.2.1.2.4 Catch Diode
          5. 8.2.1.2.5 Boost Diode
          6. 8.2.1.2.6 Boost Capacitor
          7. 8.2.1.2.7 Output Voltage
        3. 8.2.1.3 Application Curves
      2. 8.2.2  LM2736X (1.6 MHz) VBOOST Derived from VOUT 12 V to 3.3 V / 750 mA
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedures
        3. 8.2.2.3 Application Curves
      3. 8.2.3  LM2736X (1.6 MHz) VBOOST Derived from VSHUNT 18 V to 1.5 V / 750 mA
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4  LM2736X (1.6 MHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
      5. 8.2.5  LM2736X (1.6 MHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V / 750 mA
        1. 8.2.5.1 Design Requirements
        2. 8.2.5.2 Detailed Design Procedure
        3. 8.2.5.3 Application Curves
      6. 8.2.6  LM2736Y (550 kHz) VBOOST Derived from VIN 5 V to 1.5 V / 750 mA
        1. 8.2.6.1 Design Requirements
        2. 8.2.6.2 Detailed Design Procedure
        3. 8.2.6.3 Application Curves
      7. 8.2.7  LM2736Y (550 kHz) VBOOST Derived from VOUT 12 V to 3.3 V / 750 mA
        1. 8.2.7.1 Design Requirements
        2. 8.2.7.2 Detailed Design Procedure
        3. 8.2.7.3 Application Curves
      8. 8.2.8  LM2736Y (550 kHz) VBOOST Derived from VSHUNT 18 V to 1.5 V / 750 mA
        1. 8.2.8.1 Design Requirements
        2. 8.2.8.2 Detailed Design Procedure
        3. 8.2.8.3 Application Curves
      9. 8.2.9  LM2736Y (550 kHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 750 mA
        1. 8.2.9.1 Design Requirements
        2. 8.2.9.2 Detailed Design Procedure
        3. 8.2.9.3 Application Curves
      10. 8.2.10 LM2736Y (550 kHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V / 750 mA
        1. 8.2.10.1 Design Requirements
        2. 8.2.10.2 Detailed Design Procedure
        3. 8.2.10.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Layout

10.1 Layout Guidelines

When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing the layout is the close coupling of the GND connections of the CIN capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in importance is the location of the GND connection of the COUT capacitor, which should be near the GND connections of CIN and D1.

There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island.

The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 should be routed away from the inductor and any other traces that are switching.

High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible. However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor.

The remaining components should also be placed as close as possible to the IC. Please see Application Note AN-1229 SNVA054 for further considerations and the LM2736 device demo board as an example of a four-layer layout.

10.2 Layout Example

ExlLayout_snvs316.pngFigure 31. Top Layer
layoutschem_snvs316.gifFigure 32. Layout Schematic