ZHCS535M February   2013  – October 2020 LM22679 , LM22679-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings: LM22679
    3. 6.3 Handling Ratings: LM22679-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 UVLO
      2. 7.3.2 Soft-Start
      3. 7.3.3 Bootstrap Supply
      4. 7.3.4 Internal Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Current Limit
      4. 7.4.4 Current Limit Adjustment
      5. 7.4.5 Thermal Protection
      6. 7.4.6 Duty-Cycle Limits
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Voltage Divider Selection
      2. 8.1.2 Power Diode
    2. 8.2 Typical Application
      1. 8.2.1 Typical Buck Regulator Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 External Components
          2. 8.2.1.2.2 Inductor
          3. 8.2.1.2.3 Input Capacitor
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Bootstrap Capacitor
        3. 8.2.1.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 支持资源
    3. 11.3 接收文档更新通知
    4. 11.4 Trademarks
    5. 11.5 术语表
    6. 11.6 静电放电警告

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout Guidelines

Board layout is critical for the proper operation of switching power supplies. First, the ground plane area must be sufficient for thermal dissipation purposes. Second, appropriate guidelines must be followed to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such cases, the rapid increase of input current combined with the parasitic trace inductance generates unwanted L di/dt noise spikes. The magnitude of this noise tends to increase as the output current increases. This noise may turn into electromagnetic interference (EMI) and can also cause problems in device performance. Therefore, care must be taken in layout to minimize the effect of this switching noise.

The most important layout rule is to keep the ac current loops as small as possible. Figure 10-1 shows the current flow in a buck converter. The top schematic shows a dotted line which represents the current flow during the FET switch on-state. The middle schematic shows the current flow during the FET switch off-state.

The bottom schematic shows the currents referred to as ac currents. These ac currents are the most critical because they are changing in a very short time period. The dotted lines of the bottom schematic are the traces to keep as short and wide as possible. This will also yield a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the PCB layout example. Best results are achieved if the placement of the LM22679, the bypass capacitor, the Schottky diode, RFBB, RFBT, and the inductor are placed as shown in Figure 10-2. In the layout shown, R1 = RFBB and R2 = RFBT. It is also recommended to use 2 oz copper boards or heavier to help thermal dissipation and to reduce the parasitic inductances of board traces. See AN-1229 SIMPLE SWITCHER ® PCB Layout Guidelines (SNVA054) for more information.

GUID-80A8B07D-4294-4B51-90AB-6DD9D739BD6C-low.gifFigure 10-1 Current Flow in a Buck Application