ZHCSFH5A March   2016  – September 2016 ISO7821LLS

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  DC Electrical Characteristics
    10. 6.10 DC Supply Current Characteristics
    11. 6.11 Timing Requirements for Distortion Correction Scheme
    12. 6.12 Switching Characteristics
    13. 6.13 Insulation Characteristics Curves
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Distortion-Correction Scheme
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Electromagnetic Compatibility (EMC) Considerations
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Parameter Measurement Information

ISO7821LLS switch_test_circuit_sllset5.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B. CP = 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 19. Switching Characteristics Test Circuit and Voltage Waveforms
ISO7821LLS delay_time_sllset5.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B. CL = 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 20. Enable and Disable Propagation Delay Time Test Circuit and Waveform
ISO7821LLS failsafe_sllset5.gif
A. CL = 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 21. Default Output Delay Time Test Circuit and Voltage Waveforms
ISO7821LLS com_tran_imm_test_circ_sllset5.gif
A. CL = 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 22. Common-Mode Transient Immunity Test Circuit
ISO7821LLS driver_test_circuit_sllset8.gif Figure 23. Driver Test Circuit
ISO7821LLS td_definitions_sllset8.gif Figure 24. Voltage Definitions and Waveforms