ZHCSFH5A
March 2016 – September 2016
ISO7821LLS
PRODUCTION DATA.
1
特性
2
应用
3
说明
4
修订历史记录
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
DC Electrical Characteristics
6.10
DC Supply Current Characteristics
6.11
Timing Requirements for Distortion Correction Scheme
6.12
Switching Characteristics
6.13
Insulation Characteristics Curves
6.14
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Distortion-Correction Scheme
8.4
Device Functional Modes
8.4.1
Device I/O Schematics
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Electromagnetic Compatibility (EMC) Considerations
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Material
11.2
Layout Example
12
器件和文档支持
12.1
文档支持
12.1.1
相关文档
12.2
接收文档更新通知
12.3
社区资源
12.4
商标
12.5
静电放电警告
12.6
Glossary
13
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
DWW|16
MPDS567
DW|16
MSOI003I
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsfh5a_oa
zhcsfh5a_pm
7
Parameter Measurement Information
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
B.
C
P
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 19.
Switching Characteristics Test Circuit and Voltage Waveforms
A.
The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle,
t
r
≤ 3 ns, t
f
≤ 3 ns, Z
O
= 50 Ω.
B.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 20.
Enable and Disable Propagation Delay Time Test Circuit and Waveform
A.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 21.
Default Output Delay Time Test Circuit and Voltage Waveforms
A.
C
L
= 5 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 22.
Common-Mode Transient Immunity Test Circuit
Figure 23.
Driver Test Circuit
Figure 24.
Voltage Definitions and Waveforms