ZHCSIE0A June   2018  – October 2018 ISO224

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 器件比较表
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Input Clamp Protection Circuit
      3. 8.3.3 Isolation Channel Signal Transmission
      4. 8.3.4 Fail-Safe Output
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.12 Typical Characteristics

at TA = 25°C, VDD1 = VDD2 = 5 V, and VINP = –12 V to 12 V, unless otherwise noted.
ISO224 D003_SBAS738.gif
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Figure 5. Input Offset Voltage Histogram
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Figure 7. Input Offset Voltage vs Low-Side Supply Voltage
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Figure 9. Input Offset Drift Histogram
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Figure 11. Input Bias Current vs Temperature
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Figure 13. Gain Error Histogram
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Figure 15. Gain Error vs High-Side Supply Voltage
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Figure 17. Gain Error vs Temperature
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Figure 19. Normalized Gain vs Input Frequency
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Figure 21. Output Voltage vs Input Voltage
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Figure 23. Nonlinearity vs High-Side Supply Voltage
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Figure 25. Nonlinearity vs Temperature
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Figure 27. Total Harmonic Distortion
vs Low-Side Supply Voltage
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Figure 29. Power-Supply Rejection Ratio
vs Ripple Frequency
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Figure 31. Output Common-Mode Voltage vs Temperature
ISO224 D031_SBAS738.gif
Figure 33. Low-Side Supply Current
vs Low-Side Supply Voltage
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Figure 35. Output Rise and Fall Time
vs Low-Side Supply Voltage
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Figure 37. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
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Figure 39. VIN to VOUT Signal Delay vs Temperature
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Figure 6. Input Offset Voltage vs High-Side Supply Voltage
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Figure 8. Input Offset Voltage vs Temperature
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Figure 10. Input Bias Current vs High-Side Supply Voltage
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Figure 12. Input-Referred Noise Density vs Frequency
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Figure 14. Gain Error Histogram
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Figure 16. Gain Error vs Low-Side Supply Voltage
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Figure 18. Gain Error Drift Histogram
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Figure 20. Output Phase vs Input Frequency
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Figure 22. Nonlinearity vs Input Voltage
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Figure 24. Nonlinearity vs Low-Side Supply Voltage
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Figure 26. Total Harmonic Distortion
vs High-Side Supply Voltage
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Figure 28. Total Harmonic Distortion vs Temperature
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Figure 30. Output Common-Mode Voltage
vs Low-Side Supply Voltage
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Figure 32. High-Side Supply Current
vs High-Side Supply Voltage
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Figure 34. Supply Current vs Temperature
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Figure 36. Output Rise and Fall Time vs Temperature
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Figure 38. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
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Figure 40. VIN to VOUT Signal Delay vs Temperature