ZHCSE00E may   2014  – december 2020 HD3SS215

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Description (continued)
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings #GUID-892340A8-A891-4B90-B8E2-B582AB533890/SLAS9018663 #GUID-892340A8-A891-4B90-B8E2-B582AB533890/SLAS9012713
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Electrical Characteristics, Device Parameters #GUID-222D29AA-746D-4606-8967-F0F2E648EFF8/SLAS9019128
    7. 7.7 Switching Characteristics
    8. 7.8 Timing Diagrams
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High Speed Switching
      2. 8.3.2 HPD, AUX, and DDC Switching
      3. 8.3.3 Output Enable and Power Savings
    4. 8.4 Device Functional Modes
      1. 8.4.1 Switch Control Modes
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 DisplayPort and Dual Mode Adapter with Two Sources
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 HDMI Application with Two Sinks
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 36
      4. 9.2.4 HDMI 2:1 Sink Application Using the RTQ Package
  11.   Power Supply Recommendations
  12. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  13. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
  14. 12Mechanical, Packaging, and Orderable Information

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Detailed Design Procedure

The HD3SS215 is designed to operate with a 3.3 V power supply. Levels above those listed in the Absolute Ratings table should not be used. If using a higher voltage system power supply, a voltage regulator can be used to step down to 3.3 V. Decoupling capacitors may be used to reduce noise and improve power supply integrity. AC capacitors must be placed on the MainLink lines. Additionally, AC capacitors are placed on the AUXC lines. After the blocking capacitors, the AUXCp line must be pulled down weakly through a resistor to ground, and the AUXCn line must be pulled up weakly through a resistor to VDD. The voltage level of the control pins, AUX_SEL and Dx_SEL should be set according to the application and muxing desired. For a DisplayPort connector, the CONFIG1 and CONFIG2 pins should be pulled to ground through resistors. For Dual Mode adapter implementation, the CONFIG1 line may be used to perform cable adapter detection. The CONFIG2 line can be configured for an HDMI adaptor or left as a no connect for a DVI adapter. The CONFIG2 pin on the connector should be pulled up or left floating accordingly for Dual Mode adapter configuration.