ZHCSR82 November   2022 ESD2CANFD24

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 绝对最大额定值
    2. 6.2 ESD 等级 - JEDEC 规格
    3. 6.3 ESD 等级 - IEC 规格
    4. 6.4 建议运行条件
    5. 6.5 热性能信息
    6. 6.6 电气特性
    7. 6.7 Typical Characteristics – ESD2CANFD24
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Temperature Range
      2. 7.3.2 IEC 61000-4-2 ESD Protection
      3. 7.3.3 IEC 61000-4-5 Surge Protection
      4. 7.3.4 IO Capacitance
      5. 7.3.5 Dynamic Resistance
      6. 7.3.6 DC Breakdown Voltage
      7. 7.3.7 Ultra Low Leakage Current
      8. 7.3.8 Clamping Voltage
      9. 7.3.9 Industry Standard Leaded Packages
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Clamping Voltage

The IO pins feature an ESD clamp that is capable of clamping the voltage to 37 V (IPP = 3.5 A) and 36 V (IPP = 16 A for TLP).