ZHCSHL9A February   2018  – March 2018 ESD224

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     典型应用原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings -JEDEC Specifications
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Setup
    1. 7.1 IEC 61000-4-2 System Level ESD Test Setup with HDMI Driver for Clamping Voltage Measurement
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 IEC 61000-4-2 ESD Protection
      2. 8.3.2 IEC 61000-4-4 EFT Protection
      3. 8.3.3 IEC 61000-4-5 Surge Protection
      4. 8.3.4 IO Capacitance
      5. 8.3.5 DC Breakdown Voltage
      6. 8.3.6 Ultra Low Leakage Current
      7. 8.3.7 Low ESD Clamping Voltage
      8. 8.3.8 Supports High Speed Interfaces
      9. 8.3.9 Industrial Temperature Range
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Signal Range
        2. 9.2.2.2 Operating Frequency
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

ESD224 D001_SLVSEB4.gifFigure 1. Positive TLP Curve, Connector side IO Pin to GND (tp=100ns)
ESD224 D003_new_SLVSEB4.gifFigure 3. Clamping voltage waveform for +8kV IEC 61000-4-2 stress. See Figure 11 for details.
ESD224 D005_SLVSEB4.gifFigure 5. IEC 61000-4-5 Surge Waveform (tp=8/20 µs)
ESD224 D007_SLVSEB4.gifFigure 7. DC Voltage Sweep I-V Curve, IO Pin to GND
ESD224 D011_SLVSEB4_Insertion_Loss.gifFigure 9. Differential Insertion Loss
ESD224 D002_SLVSEB4.gifFigure 2. Negative TLP Curve, Connector side IO Pin to GND (Plotted as positive TLP from GND to IO, tp=100ns )
ESD224 D004_new_SLVSEB4.gifFigure 4. Clamping voltage waveform for -8kV IEC 61000-4-2 stress. See Figure 11 for details.
ESD224 D009_SLVSEB4.gifFigure 6. Capacitance vs. Bias Voltage at 25 degree Celsius
ESD224 D008_SLVSEB4.gifFigure 8. Leakage Current vs Temperature, IO Pin to GND, at 2.5 V Bias
ESD224 D010_SLVSEB4_Cap_Freq.gifFigure 10. Capacitance vs Frequency