ZHCSIL1A July   2018  – December 2018 DSLVDS1001

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     功能图
    2.     典型应用
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DSLVDS1001 Driver Functionality
      2. 8.3.2 Driver Output Voltage and Power-On Reset
      3. 8.3.3 Driver Offset
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Point-to-Point Communications
    3. 9.3 Design Requirements
    4. 9.4 Detailed Design Procedure
      1. 9.4.1 Driver Supply Voltage
      2. 9.4.2 Driver Bypass Capacitance
      3. 9.4.3 Driver Input Voltage
      4. 9.4.4 Driver Output Voltage
      5. 9.4.5 Interconnecting Media
      6. 9.4.6 PCB Transmission Lines
      7. 9.4.7 Termination Resistor
    5. 9.5 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9.4.7 Termination Resistor

As shown earlier, an LVDS communication channel employs a current source driving a transmission line that is terminated with a resistive load. This load serves to convert the transmitted current into a voltage at the receiver input. To ensure incident wave switching (which is necessary to operate the channel at the highest signaling rate), the termination resistance should be matched to the characteristic impedance of the transmission line. The designer should ensure that the termination resistance is within 10% of the nominal media characteristic impedance. If the transmission line is targeted for 100-Ω impedance, the termination resistance should be between 90 Ω and 110 Ω.

The line termination resistance should be placed as close to the receiver as possible to minimize the stub length from the resistor to the receiver.

Remember to only place line termination resistors at the end(s) of the transmission line in these multidrop topologies.