ZHCSJU2H May   2008  – May 2019 DS90LV028AQ-Q1

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      功能图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Performance Curves
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Detailed Design Procedure
        1. 9.2.1.1 Power Decoupling Recommendations
        2. 9.2.1.2 Termination
        3. 9.2.1.3 Input Failsafe Biasing
        4. 9.2.1.4 Probing LVDS Transmission Lines
        5. 9.2.1.5 Cables and Connectors, General Comments
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Differential Traces
      2. 10.1.2 PC Board Considerations
  11. 11器件和文档支持
    1. 11.1 器件支持
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9.2.1.1 Power Decoupling Recommendations

Bypass capacitors must be used on power pins. Use high frequency ceramic (surface mount is recommended) 0.1 μF and 0.01 μF capacitors in parallel at the power supply pin with the smallest value capacitor closest to the device supply pin. Additional scattered capacitors over the printed circuit board will improve decoupling. Multiple vias should be used to connect the decoupling capacitors to the power planes. A 10 μF (35 V) or greater solid tantalum capacitor should be connected at the power entry point on the printed circuit board between the supply and ground.