ZHCSR68 August   2020 DS90LV028A-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD and Latch-Up Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Performance Curves
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 Termination
        3. 9.2.2.3 Input Failsafe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Differential Traces
      2. 11.1.2 PC Board Considerations
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 支持资源
    2. 12.2 Trademarks
    3. 12.3 静电放电警告
    4. 12.4 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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6.6 Switching Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.(2)(4)(5)
SymbolParameterConditionsMinTypMaxUnits
tPHLDDifferential Propagation Delay High to LowCL = 15 pF1.01.62.5ns
tPLHDDifferential Propagation Delay Low to HighVID = 200 mV1.01.72.5ns
tSKD1Differential Pulse Skew |tPHLD − tPLHD| (6)(Figure 7-1 and Figure 7-2)050650ps
tSKD2Differential Channel-to-Channel Skew-same device (7)00.10.5ns
tSKD3Differential Part to Part Skew (8)01.0ns
tSKD4Differential Part to Part Skew (9)01.5ns
tTLHRise Time325800ps
tTHLFall Time225800ps
fMAXMaximum Operating Frequency (10)250MHz
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified (such as VID).
(2) All typicals are given for: VCC = +3.3V and TA = +25°C.
(3) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed maximum junction temperature specification.
(4) CL includes probe and jig capacitance.
(5) Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr and tf (0% to 100%) ≤ 3 ns for RIN.
(6) tSKD1 is the magnitude difference in differential propagation delay time between the positive-going-edge and the negative-going-edge of the same channel.
(7) tSKD2 is the differential channel-to-channel skew of any event on the same device. This specification applies to devices having multiple receivers within the integrated circuit.
(8) tSKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
(9) tSKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min| differential propagation delay.
(10) fMAX generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35 peak to peak). Output criteria: 60%/40% duty cycle, VOL (max 0.4V), VOH (min 2.7V), load = 15 pF (stray plus probes).