ZHCSDR9D July   2012  – May 2015 DS125BR401

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 典型应用
  5. 修订历史记录
  6. 说明(续)
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Electrical Characteristics — Serial Management Bus Interface
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Typical 4-Level Input Thresholds
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pin Control Mode
      2. 9.4.2 SMBUS Mode
    5. 9.5 Programming
      1. 9.5.1 PCIe Signal Integrity
        1. 9.5.1.1 RX-Detect in SAS/SATA (up to 6 Gbps) Applications
          1. 9.5.1.1.1 Signal Detect Control for Datarates Above 8 Gbps
        2. 9.5.1.2 MODE Operation With SMBus Registers
      2. 9.5.2 SMBUS Master Mode
      3. 9.5.3 System Management Bus (SMBus) and Configuration Registers
        1. 9.5.3.1 Transfer of Data Through the SMBus
        2. 9.5.3.2 SMBus Transactions
        3. 9.5.3.3 Writing a Register
        4. 9.5.3.4 Reading a Register
    6. 9.6 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 3.3-V or 2.5-V Supply Mode Operation
    2. 11.2 Power Supply Bypassing
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Layout Considerations for Differential Pairs
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档
    2. 13.2 Community Resources
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 术语表
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11 Power Supply Recommendations

11.1 3.3-V or 2.5-V Supply Mode Operation

The DS125BR401 has an optional internal voltage regulator to provide the 2.5-V supply to the device. In 3.3-V mode operation, the VIN pin = 3.3 V is used to supply power to the device. The internal regulator will provide the 2.5 V to the VDD pins of the device and a 0.1 µF capacitor is needed at each of the 5 VDD pins for power supply decoupling (total capacitance should be ≤ 0.5 µF), and the VDD pins should be left open. The VDD_SEL pin must be tied to GND to enable the internal regulator. In 2.5-V mode operation, the VIN pin should be left open and the 2.5-V supply must be applied to the 5 VDD pins to power the device. The VDD_SEL pin must be left open (no connect) to disable the internal regulator.

DS125BR401 30198706.gifFigure 25. 3.3-V or 2.5-V Supply Connection Diagram

11.2 Power Supply Bypassing

TI recommends two routing options to ensure that the DS125BR401 is provided with an adequate power supply. First, the supply (VDD) and ground (GND) pins should be connected to power planes routed on adjacent layers of the printed circuit board. The layer thickness of the dielectric should be minimized so that the VDD and GND planes create a low inductance supply with distributed capacitance. Second, careful attention to supply bypassing through the proper use of bypass capacitors is required. A 0.1-μF bypass capacitor should be connected to each VDD pin such that the capacitor is placed as close as possible to the DS125BR401. Smaller body size capacitors can help facilitate proper component placement. Additionally, capacitor with capacitance in the range of 1 μF to 10 μF should be incorporated in the power supply bypassing design as well. These capacitors can be either tantalum or an ultra-low ESR ceramic.