SLVSET1 August 2018 DRV8873
PRODUCTION DATA.
IC1 control is shown in Figure 32 and described in Table 24.
Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TOFF | SPI_IN | SR | MODE | ||||
R/W-01b | R/W-0b | R/W-100b | R/W-01b |
Bit | Field | Type | Default | Description |
---|---|---|---|---|
7-6 | TOFF | R/W | 01b |
00b = 20 µs 01b = 40 µs 10b = 60 µs 11b = 80 µs |
5 | SPI_IN | R/W | 0b |
0b = Outputs follow input pins (INx) 1b = Outputs follow SPI registers EN_IN1 and PH_IN2 |
4-2 | SR | R/W | 100b |
000b = 53.2-V/µs rise time 001b = 34-V/µs rise time 010b = 18.3-V/µs rise time 011b = 13-V/µs rise time 100b = 10.8-V/µs rise time 101b = 7.9-V/µs rise time 110b = 5.3-V/µs rise time 111b = 2.6-V/µs rise time |
1-0 | MODE | R/W | 01b |
00b = PH/EN 01b = PWM 10b = Independent half bridge 11b = Input disabled; bridge Hi-Z |