图 8-1 示出了抖动型偏置控制 电路偏置 MZM 的简化电路图。如图所示，该电路需要四个差分输入对用于 IQ 偏置，需要两个差分输入对用于相位偏置。要偏置 LiNbO₃ MZM，电压可高达 ±18V，而电流要求约为几微安。接收器的低截止频率通常为 100kHz，因此抖动信号的带宽远低于该频率。请注意，只有 IQ 偏置输入需要抖动信号，而不需要相位偏置。DACx1416 具有切换模式，在该模式下，输出可配置为提供施加在直流偏置上的方波。该模式要求设置方波的高电平和低电平代码，并且转换与所选的切换输入引脚同步。下面提供了使用切换功能来实现抖动输出的伪代码。

//SYNTAX: WRITE <REGISTER NAME>,<DATA>
//Power-on Device, Disable Soft-toggle
WRITE SPICONFIG,0x0A84
//Select Range for all 12 channels as ±10V
WRITE DACRANGE2, 0xAAAA
WRITE DACRANGE3, 0xAAAA
WRITE DACRANGE4, 0xAAAA
//Power-on DAC Channels 0 - 11
WRITE DACPWDWN,0xF000
//Write HIGH code to Register A of all IQ Bias Differential Pairs
WRITE DAC0,0xXXXX
WRITE DAC2,0xXXXX
WRITE DAC4,0xXXXX
WRITE DAC6,0xXXXX
//Write Data to Phase Bias Channels
WRITE DAC8,0xXXXX
WRITE DAC10,0xXXXX
//Enable Sync for All Differential Pairs
WRITE SYNCCONFIG,0x0FFF
//Enable Software LDAC
WRITE TRIGGER,0x0002
//Write LOW code to Register B of all IQ Bias Differential Pairs
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
WRITE DAC_DATA0,0xXXXX
//Turn Toggle Mode ON for All IQ Differential Pairs
//DAC11-10:Y/Phase Bias , DAC9-8:Y/I Bias - TOGG0, DAC7-6:Y/Q Bias - TOGG 1
//DAC5-4:Y/Phase Bias , DAC3-2:Y/I Bias - TOGG0, DAC1-0:Y/Q Bias - TOGG 1
WRITE TOGGCONFIG0,0x0005
WRITE TOGGCONFIG1,0xA05A
//Method to Modify the DC Value of Any IQ Differential Pair
//Turn Off Toggle Mode for that Channel (e.g. DAC0-1)
WRITE TOGGCONFIG1,0xA050
//Turn Off Sync for the Channel
WRITE SYNCCONFIG,0x0FFC
//Write HIGH code to Register A of the Channel Pair
WRITE DAC0,0xXXXX
//Turn On Sync for the Channel Pair
WRITE SYNCCONFIG,0x0FFF
//Turn On Toggle for the Channel Pair
WRITE TOGGCONFIG1,0xA05A

抖动频率可设置为 1kHz 和 2kHz，以便单极 RC 低通滤波器在 100kHz 时提供足够的衰减。例如，当 R1 = R2 = 10 kΩ 且 C = 0.01 µF 时，在 100kHz 下可获得大约 40dB 的衰减。