ZHCSFT0 December   2016 CSD18511Q5A

PRODUCTION DATA.  

  1. 1特性
  2. 2应用范围
  3. 3说明
  4. 4修订历史记录
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6器件和文档支持
    1. 6.1 接收文档更新通知
    2. 6.2 社区资源
    3. 6.3 商标
    4. 6.4 静电放电警告
    5. 6.5 Glossary
  7. 7机械、封装和可订购信息
    1. 7.1 Q5A 封装尺寸
    2. 7.2 建议印刷电路板 (PCB) 布局
    3. 7.3 建议模板开口
    4. 7.4 Q5A 卷带信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Specifications

Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 40 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 32 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 1.5 1.8 2.4 V
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V, ID = 24 A 2.7 3.5
VGS = 10 V, ID = 24 A 1.9 2.3
gƒs Transconductance VDS = 20 V, ID = 24 A 5.2 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 20 V,
ƒ = 1 MHz
4500 5850 pF
Coss Output Capacitance 452 588 pF
Crss Reverse Transfer Capacitance 238 309 pF
RG Series Gate Resistance 0.7 1.4 Ω
Qg Gate Charge Total (10 V) VDS = 20 V, ID = 24 A 63 82 nC
Qg Gate Charge Total (4.5 V) 31 41 nC
Qgd Gate Charge Gate-to-Drain 11.2 nC
Qgs Gate Charge Gate-to-Source 13.2 nC
Qg(th) Gate Charge at Vth 8.2 nC
Qoss Output Charge VDS = 20 V, VGS = 0 V 20 nC
td(on) Turn On Delay Time VDS = 20 V, VGS = 10 V,
IDS = 24 A, RG = 0
6 ns
tr Rise Time 15 ns
td(off) Turn Off Delay Time 24 ns
tƒ Fall Time 5 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage IDS = 24 A, VGS = 0 V 0.75 1 V
Qrr Reverse Recovery Charge VDS= 20 V, IF = 24 A, di/dt = 300 A/μs 17 nC
trr Reverse Recovery Time 14 ns

Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance(1) 1.2 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 50
RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
CSD18511Q5A M0137-01_LPS198.gif
Max RθJA = 50°C/W when mounted on 1 inch2 (6.45-cm2) of
2-oz. (0.071-mm thick) Cu.
CSD18511Q5A M0137-02_LPS198.gif
Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz.
(0.071-mm thick) Cu.

Typical MOSFET Characteristics

TA = 25°C (unless otherwise stated)
CSD18511Q5A D001_SLPS631.png
Figure 1. Transient Thermal Impedance
CSD18511Q5A D002_SLPS631.gif
Figure 2. Saturation Characteristics
CSD18511Q5A D004_SLPS631.gif
ID = 24 A, VDS = 20 V
Figure 4. Gate Charge
CSD18511Q5A D006_SLPS631.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD18511Q5A D008_SLPS631.gif
ID = 24 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD18511Q5A D010_SLPS631.gif
Single pulse, max RθJC= 1.2°C/W
Figure 10. Maximum Safe Operating Area
CSD18511Q5A D012_SLPS631.gif
Max RθJC= 1.2°C/W
Figure 12. Maximum Drain Current vs Temperature
CSD18511Q5A D003_SLPS631.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD18511Q5A D005_SLPS631.gif
Figure 5. Capacitance
CSD18511Q5A D007_SLPS631.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD18511Q5A D009_SLPS631.gif
Figure 9. Typical Diode Forward Voltage
CSD18511Q5A D011_SLPS631.gif
Figure 11. Single Pulse Unclamped Inductive Switching