ZHCSUH0G August   2007  – January 2024 CDCE949 , CDCEL949

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 EEPROM Specification
    7. 5.7 Timing Requirements: CLK_IN
    8. 5.8 Timing Requirements: SDA/SCL
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Terminal Setting
      2. 7.3.2 Default Device Setting
      3. 7.3.3 SDA/SCL Serial Interface
      4. 7.3.4 Data Protocol
    4. 7.4 Device Functional Modes
      1. 7.4.1 SDA/SCL Hardware Interface
    5. 7.5 Programming
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Spread Spectrum Clock (SSC)
        2. 8.2.2.2 PLL Frequency Planning
        3. 8.2.2.3 Crystal Oscillator Start-Up
        4. 8.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 8.2.2.5 Unused Inputs and Outputs
        6. 8.2.2.6 Switching Between XO and VCXO Mode
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Register Maps
    1. 9.1 SDA/SCL Configuration Registers
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
    2. 10.2 Related Documentation
    3. 10.3 Related Links
    4. 10.4 接收文档更新通知
    5. 10.5 支持资源
    6. 10.6 Trademarks
    7. 10.7 静电放电警告
    8. 10.8 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Revision History

Changes from Revision F (October 2016) to Revision G (January 2024)

  • 将数据表标题从CDCE(L)913:支持 SSC 以降低 EMI 的灵活低功耗 LVCMOS 时钟发生器 更改为 CDCE(L)949:支持 SSC 以降低 EMI 的灵活低功耗 LVCMOS 时钟发生器 Go
  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 将提到 I2C 的旧术语实例通篇更改为控制器和目标Go
  • 器件信息 表更改为封装信息 Go

Changes from Revision E (August 2016) to Revision F (October 2016)

  • 将数据表标题从CDCEx949 具有 1.8V、2.5V 和 3.3V LVCMOS 输出的可编程 4-PLL VCXO 时钟合成器 更改为CDCE(L)913:支持 SSC 以降低 EMI 的灵活低功耗 LVCMOS 时钟发生器 Go

Changes from Revision D (March 2010) to Revision E (August 2016)

  • 添加了器件信息 表、ESD 等级 表、特性说明 部分、器件功能模式应用和实施 部分、电源相关建议 部分、布局 部分、器件和文档支持 部分以及机械、封装和可订购信息 部分Go
  • 压缩了特性 中的要点Go
  • 应用 中删除了“通用频率合成”Go
  • Updated values in the Thermal Information table to align with JEDEC standards Go
  • Changed Byte Read Protocol image, second S to SrGo
  • Changed 100 MHz < ƒVCO > 200 MHz; TO 80 MHz ≤ ƒVCO ≤ 230 MHz; and changed 0 ≤ p ≤ 7 TO 0 ≤ p ≤ 4Go
  • Changed under Example, fifth row, N", 2 places TO N'Go

Changes from Revision C (October 2009) to Revision D ()

  • Added PLL settings limits: 16 ≤ q ≤ 63, 0 ≤ p ≤ 7, 0 ≤ r ≤ 511, 0 < N < 4096 foot to PLL1, PLL2, PLL3, & PLL4 Configure Register TableGo

Changes from Revision B (September 2009) to Revision C ()

  • Deleted sentence - A different default setting can be programmed on customer request. Contact Texas Instruments sales or marketing representative for more information.Go

Changes from Revision A (December 2007) to Revision B ()

  • Added Note 3: SDA and SCL can go up to 3.6 V as stated in the Recommended Operating Conditions tableGo

Changes from Revision * (August 2007) to Revision A ()

  • Changed the THERMAL RESISTANCE FOR TSSOP tableGo
  • Changed Changed all values in this column except for new rows. Old values were 85, 80, 78, 76, 26Go
  • Added Added RowGo
  • Added Added rowGo
  • Added Added rowGo
  • Added Added rowGo
  • Changed Generic Configuration Register table RID From: 0h To: XbGo
  • Added note to the PWDN description, Generic Configuration Register tableGo