ZHCSSP2B June   2023  – February 2025 CC2674P10

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 功能方框图
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RGZ Package (Top View)
    2. 6.2 Signal Descriptions—RGZ Package
    3. 6.3 Connections for Unused Pins and Modules—RGZ Package
    4. 6.4 Pin Diagram—RSK Package (Top View)
    5. 6.5 Signal Descriptions—RSK Package
    6. 6.6 Connection of Unused Pins and Module—RSK Package
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  3VModules
    5. 7.5  Power Consumption—Power Modes
    6. 7.6  Power Consumption—Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 Bluetooth Low Energy—Receive (RX)
    11. 7.11 Bluetooth Low Energy—Transmit (TX)
    12. 7.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4GHz (OQPSK DSSS1:8, 250kbps)—RX
    13. 7.13 Zigbee and Thread - IEEE 802.15.4–2006 2.4GHz (OQPSK DSSS1:8, 250kbps)—TX
    14. 7.14 Timing and Switching Characteristics
      1. 7.14.1 Reset Timing
      2. 7.14.2 Wakeup Timing
      3. 7.14.3 Clock Specifications
        1. 7.14.3.1 48MHz Clock Input (TCXO)
        2. 7.14.3.2 48MHz Crystal Oscillator (XOSC_HF)
        3. 7.14.3.3 48MHzRC Oscillator (RCOSC_HF)
        4. 7.14.3.4 2MHz RC Oscillator (RCOSC_MF)
        5. 7.14.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 7.14.3.6 32kHz RC Oscillator (RCOSC_LF)
      4. 7.14.4 Serial Peripheral Interface (SPI) Characteristics
        1. 7.14.4.1 SPI Characteristics
        2. 7.14.4.2 SPI Master Mode
        3. 7.14.4.3 SPI Master Mode Timing Diagrams
        4. 7.14.4.4 SPI Slave Mode
        5. 7.14.4.5 SPI Slave Mode Timing Diagrams
      5. 7.14.5 UART
        1. 7.14.5.1 UART Characteristics
    15. 7.15 Peripheral Characteristics
      1. 7.15.1 ADC
        1. 7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.15.2 DAC
        1. 7.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.15.3 Temperature and Battery Monitor
        1. 7.15.3.1 Temperature Sensor
        2. 7.15.3.2 Battery Monitor
      4. 7.15.4 Comparators
        1. 7.15.4.1 Low-Power Clocked Comparator
        2. 7.15.4.2 Continuous Time Comparator
      5. 7.15.5 Current Source
        1. 7.15.5.1 Programmable Current Source
      6. 7.15.6 GPIO
        1. 7.15.6.1 GPIO DC Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 MCU Current
      2. 7.16.2 RX Current
      3. 7.16.3 TX Current
      4. 7.16.4 RX Performance
      5. 7.16.5 TX Performance
      6. 7.16.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth 5.3 Low Energy
      2. 8.3.2 802.15.4 Thread, Zigbee, and 6LoWPAN
    4. 8.4  Memory
    5. 8.5  Sensor Controller
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Serial Peripherals and I/O
    9. 8.9  Battery and Temperature Monitor
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
    3. 10.3 Documentation Support
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

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7.13 Zigbee and Thread - IEEE 802.15.4–2006 2.4GHz (OQPSK DSSS1:8, 250kbps)—TX

Measured on the LP-EM-CC1354P10–1 reference design with Tc = 25°C, VDDS = 3.0V, fRF= 2440MHz with
DC/DC enabled and high power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input with a combined RX and TX path and through an RF switch as part of the reference design. All measurements are performed conducted.
 
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
General Parameters
Max output power, high power PA(1)Differential mode, delivered to a single-ended 50Ω load through a balun19.5dBm
Output power programmable range,
high power PA(1)		Differential mode, delivered to a single-ended 50Ω load through a balun6dB
Max output power, high power PA, 10dBm configuration(2)Differential mode, delivered to a single-ended 50Ω load through a balun10.2dBm
Output power programmable range,
high power PA, 10dBm configuration(2)		Differential mode, delivered to a single-ended 50Ω load through a balun5dB
Max output power, regular PADifferential mode, delivered to a single-ended 50Ω load through a balun5dBm
Output power programmable range,
regular PA		Differential mode, delivered to a single-ended 50Ω load through a balun26dB
Spurious emissions and harmonics
Spurious emissions,
high-power PA(3)		f < 1GHz, outside restricted bands+20dBm setting(1)< –39dBm
f < 1GHz, restricted bands FCC< –49dBm
f > 1GHz, including harmonics–40dBm
Harmonics,
high-power PA(4)		Second harmonic–35dBm
Third harmonic–42dBm
Spurious emissions,
high-power PA, 10dBm configuration(2)(3)		f < 1GHz, outside restricted bands+10dBm setting(2)< –36dBm
f < 1GHz, restricted bands ETSI< –47dBm
f < 1GHz, restricted bands FCC< –55dBm
f > 1GHz, including harmonics–42dBm
Harmonics,
high-power PA, 10dBm configuration(2)		Second harmonic< –42dBm
Third harmonic< –42dBm
Spurious emissions,
regular PA(4)		f < 1GHz, outside restricted bands+5dBm setting< –36dBm
f < 1GHz, restricted bands ETSI< –47dBm
f < 1GHz, restricted bands FCC< –55dBm
f > 1GHz, including harmonics< –42dBm
Harmonics,
regular PA		Second harmonic< –42dBm
Third harmonic< –42dBm
IEEE 802.15.4–2006 2.4GHz (OQPSK DSSS1:8, 250kbps)
Error vector magnitude,
high power PA		+20dBm setting2%—
Error vector magnitude,
high power PA, 10dBm configuration(2)		+10dBm setting2%—
Error vector magnitude
Regular PA		+5dBm setting2%—
(1) Measured on the CC1352–7PEM-XD7793-XD24-PA24 reference design.
(2) Measured on the LP-CC1354P–8x8-XD7793-XD24-PA24–10dBm reference design.
(3) To ensure margins for passing FCC band edge requirements at 2483.5MHz, a lower than maximum output-power setting or less than 100% duty cycle may be used when operating at the upper 802.15.4 channel(s). 
(4) To ensure margins for passing FCC requirements for harmonic emission, duty cycling may be required.