ZHCSCZ3A July   2014  – November 2015 CC2540T

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Attributes
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Electrical Characteristics
    5. 4.5  Thermal Resistance Characteristics for RHA Package
    6. 4.6  General Characteristics
    7. 4.7  RF Receive Section
    8. 4.8  RF Transmit Section
    9. 4.9  Current Consumption With TPS62730
    10. 4.10 32-MHz Crystal Oscillator
    11. 4.11 32.768-kHz Crystal Oscillator
    12. 4.12 32-kHz RC Oscillator
    13. 4.13 16-MHz RC Oscillator
    14. 4.14 RSSI Characteristics
    15. 4.15 Frequency Synthesizer Characteristics
    16. 4.16 Analog Temperature Sensor
    17. 4.17 Comparator Characteristics
    18. 4.18 ADC Characteristics
    19. 4.19 Control Input AC Characteristics
    20. 4.20 SPI AC Characteristics
    21. 4.21 Debug Interface AC Characteristics
    22. 4.22 Timer Inputs AC Characteristics
    23. 4.23 DC Characteristics
    24. 4.24 Typical Characteristics
    25. 4.25 Typical Current Savings
  5. 5Detailed Description
    1. 5.1 Overview
    2. 5.2 Functional Block Diagram
    3. 5.3 Block Descriptions
      1. 5.3.1 CPU and Memory
      2. 5.3.2 Peripherals
  6. 6Applications, Implementation, and Layout
    1. 6.1 Application Information
    2. 6.2 Input/Output Matching
    3. 6.3 Crystal
    4. 6.4 On-Chip 1.8-V Voltage Regulator Decoupling
    5. 6.5 Power-Supply Decoupling and Filtering
    6. 6.6 Reference Design
  7. 7器件和文档支持
    1. 7.1 文档支持
      1. 7.1.1 相关文档
      2. 7.1.2 社区资源
    2. 7.2 德州仪器 (TI) 低功耗射频网站
    3. 7.3 德州仪器 (TI) 低功耗射频开发者网络
    4. 7.4 低功耗射频电子新闻简报
    5. 7.5 商标
    6. 7.6 静电放电警告
    7. 7.7 出口管制提示
    8. 7.8 Glossary
  8. 8机械、封装和可订购信息
    1. 8.1 封装信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

3 Terminal Configuration and Functions

The CC2540T pinout is shown in Figure 3-1, and a short description of the pins follows in Section 3.1.

CC2540T P0076-05_WRS172.gif

NOTE:

The exposed ground pad must be connected to a solid ground plane, as this is the ground connection for the chip.
Figure 3-1 CC2540T
RHA Package (VQFN)
Top View

3.1 Pin Attributes

Table 3-1 Pin Attributes

NAME NO. TYPE DESCRIPTION
AVDD1 28 Power (analog) 2-V to 3.6-V analog power-supply connection
AVDD2 27 Power (analog) 2-V to 3.6-V analog power-supply connection
AVDD3 24 Power (analog) 2-V to 3.6-V analog power-supply connection
AVDD4 29 Power (analog) 2-V to 3.6-V analog power-supply connection
AVDD5 21 Power (analog) 2-V to 3.6-V analog power-supply connection
AVDD6 31 Power (analog) 2-V to 3.6-V analog power-supply connection
DCOUPL 40 Power (digital) 1.8-V digital power-supply decoupling. Do not use for supplying external circuits.
DGND_USB 1 Ground pin Connect to GND
DVDD_USB 4 Power (digital) 2-V to 3.6-V digital power-supply connection
DVDD1 39 Power (digital) 2-V to 3.6-V digital power-supply connection
DVDD2 10 Power (digital) 2-V to 3.6-V digital power-supply connection
GND — Ground The ground pad must be connected to a solid ground plane.
P0_0 19 Digital I/O Port 0.0
P0_1 18 Digital I/O Port 0.1
P0_2 17 Digital I/O Port 0.2
P0_3 16 Digital I/O Port 0.3
P0_4 15 Digital I/O Port 0.4
P0_5 14 Digital I/O Port 0.5
P0_6 13 Digital I/O Port 0.6
P0_7 12 Digital I/O Port 0.7
P1_0 11 Digital I/O Port 1.0: 20-mA drive capability
P1_1 9 Digital I/O Port 1.1: 20-mA drive capability
P1_2 8 Digital I/O Port 1.2
P1_3 7 Digital I/O Port 1.3
P1_4 6 Digital I/O Port 1.4
P1_5 5 Digital I/O Port 1.5
P1_6 38 Digital I/O Port 1.6
P1_7 37 Digital I/O Port 1.7
P2_0 36 Digital I/O Port 2.0
P2_1 35 Digital I/O Port 2.1
P2_2 34 Digital I/O Port 2.2
P2_3/ XOSC32K_Q2 33 Digital I/O, Analog I/O Port 2.3/32.768 kHz XOSC
P2_4/ XOSC32K_Q1 32 Digital I/O, Analog I/O Port 2.4/32.768 kHz XOSC
RBIAS 30 Analog I/O External precision bias resistor for reference current
RESET_N 20 Digital input Reset, active-low
RF_N 26 RF I/O Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX
RF_P 25 RF I/O Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
USB_N 3 Digital I/O USB N
USB_P 2 Digital I/O USB P
XOSC_Q1 22 Analog I/O 32-MHz crystal oscillator pin 1 or external-clock input
XOSC_Q2 23 Analog I/O 32-MHz crystal oscillator pin 2