ZHCSHB9E January   2018  – July 2019 CC1352R

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 Functional Block Diagram
  2. 2修订历史记录
  3. 3Device Comparison
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram – RGZ Package (Top View)
    2. 4.2 Signal Descriptions – RGZ Package
    3. 4.3 Connections for Unused Pins and Modules
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Supply and Modules
    5. 5.5  Power Consumption - Power Modes
    6. 5.6  Power Consumption - Radio Modes
    7. 5.7  Nonvolatile (Flash) Memory Characteristics
    8. 5.8  Thermal Resistance Characteristics
    9. 5.9  RF Frequency Bands
    10. 5.10 861 MHz to 1054 MHz - Receive (RX)
    11. 5.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 5.12 861 MHz to 1054 MHz - PLL Phase Noise
    13. 5.13 Bluetooth Low Energy - Receive (RX)
    14. 5.14 Bluetooth Low Energy - Transmit (TX)
    15. 5.15 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    16. 5.16 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    17. 5.17 Timing and Switching Characteristics
      1. Table 5-1 Reset Timing
      2. Table 5-2 Wakeup Timing
      3. 5.17.1    Clock Specifications
        1. Table 5-3 48 MHz Crystal Oscillator (XOSC_HF)
        2. Table 5-4 48 MHz RC Oscillator (RCOSC_HF)
        3. Table 5-5 2 MHz RC Oscillator (RCOSC_MF)
        4. Table 5-6 32.768 kHz Crystal Oscillator (XOSC_LF)
        5. Table 5-7 32 kHz RC Oscillator (RCOSC_LF)
      4. 5.17.2    Synchronous Serial Interface (SSI) Characteristics
        1. Table 5-8 Synchronous Serial Interface (SSI) Characteristics
      5. 5.17.3    UART
        1. Table 5-9 UART Characteristics
    18. 5.18 Peripheral Characteristics
      1. 5.18.1 ADC
        1. Table 5-10 Analog-to-Digital Converter (ADC) Characteristics
      2. 5.18.2 DAC
        1. Table 5-11 Digital-to-Analog Converter (DAC) Characteristics
      3. 5.18.3 Temperature and Battery Monitor
        1. Table 5-12 Temperature Sensor
        2. Table 5-13 Battery Monitor
      4. 5.18.4 Comparators
        1. Table 5-14 Continuous Time Comparator
        2. Table 5-15 Low-Power Clocked Comparator
      5. 5.18.5 Current Source
        1. Table 5-16 Programmable Current Source
      6. 5.18.6 GPIO
        1. Table 5-17 GPIO DC Characteristics
    19. 5.19 Typical Characteristics
      1. 5.19.1 MCU Current
      2. 5.19.2 RX Current
      3. 5.19.3 TX Current
      4. 5.19.4 RX Performance
      5. 5.19.5 TX Performance
      6. 5.19.6 ADC Performance
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  System CPU
    3. 6.3  Radio (RF Core)
      1. 6.3.1 Proprietary Radio Formats
      2. 6.3.2 Bluetooth 5 low energy
      3. 6.3.3 802.15.4 (Thread, Zigbee, 6LoWPAN)
    4. 6.4  Memory
    5. 6.5  Sensor Controller
    6. 6.6  Cryptography
    7. 6.7  Timers
    8. 6.8  Serial Peripherals and I/O
    9. 6.9  Battery and Temperature Monitor
    10. 6.10 µDMA
    11. 6.11 Debug
    12. 6.12 Power Management
    13. 6.13 Clock Systems
    14. 6.14 Network Processor
  7. 7Application, Implementation, and Layout
    1. 7.1 Reference Designs
  8. 8器件和文档支持
    1. 8.1 工具和软件
      1. 8.1.1 SimpleLink™ 微控制器平台
    2. 8.2 文档支持
    3. 8.3 Community Resources
    4. 8.4 商标
    5. 8.5 静电放电警告
    6. 8.6 Glossary
  9. 9机械、封装和可订购信息
    1. 9.1 封装信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGZ|48
散热焊盘机械数据 (封装 | 引脚)
订购信息

Nonvolatile (Flash) Memory Characteristics

Over operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Flash sector size 8 KB
Supported flash erase cycles before failure, full bank(1) 30 k Cycles
Supported flash erase cycles before failure, single sector(2) 60 k Cycles
Maximum number of write operations per row before sector erase(3) 83 Write Operations
Flash retention 105 °C 11.4 Years at 105 °C
Flash sector erase current Average delta current 10.7 mA
Flash sector erase time(4) 10 ms
Flash write current Average delta current, 4 bytes at a time 6.2 mA
Flash write time(4) 4 bytes at a time 21.6 µs
A full bank erase is counted as a single erase cycle on each sector
Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k cycles
Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum number of write operations per row is reached.
This number is dependent on Flash aging and increases over time and erase cycles