ZHCSF78E June 2016 – April 2019 BQ35100
PRODUCTION DATA.
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| tR | SCL/SDA rise time | 300 | ns | ||
| tF | SCL/SDA fall time | 300 | ns | ||
| tW(H) | SCL pulse width (high) | 600 | ns | ||
| tW(L) | SCL pulse width (low) | 1.3 | µs | ||
| tSU(STA) | Setup for repeated start | 600 | ns | ||
| td(STA) | Start to first falling edge of SCL | 600 | ns | ||
| tSU(DAT) | Data setup time | 100 | ns | ||
| th(DAT) | Data hold time | 0 | ns | ||
| tSU(STOP) | Setup time for stop | 600 | ns | ||
| tBUF | Bus free time between stop and start | 66 | µs | ||
| fSCL | Clock frequency | 400 | kHz | ||
Figure 1. I2C-Compatible Interface Timing Diagrams