8.5.1.20 LDOCTRL Register (Address = 0x1D) [reset = 0xB0]
LDOCTRL is shown in Figure 47 and described in Table 29.
Return to Summary Table.
Figure 47. LDOCTRL Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
EN_LS_LDO |
VLDO_4:0 |
LDO_SWITCH_CONFG |
RESERVED |
R/W-1b1 |
R/W-5b01100 |
R/W-1b0 |
R/W-1b0 |
|
Table 29. LDOCTRL Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7 |
EN_LS_LDO |
R/W |
1b1 |
LS/LDO Enable
1b0 = Disable LS/LDO
1b1 = Enable LS/LDO
|
6-2 |
VLDO_4:0 |
R/W |
5b01100 |
LDO output voltage setting
LDO Voltage = 600mV + VLDO Code x 100mV |
1 |
LDO_SWITCH_CONFG |
R/W |
1b0 |
LDO / Load Switch Configuration Select
1b0 = LDO
1b1 = Load Switch
|
0 |
RESERVED |
R/W |
1b0 |
Reserved |