ZHCSJD3B July 2018 – February 2019 BQ25150
PRODUCTION DATA.
Table 8 lists the memory-mapped registers for the I2C registers. All register offset addresses not listed in Table 8 should be considered as reserved locations and the register contents should not be modified.
Address | Acronym | Register Name | Section |
---|---|---|---|
0x0 | STAT0 | Charger Status 0 | Go |
0x1 | STAT1 | Charger Status 1 | Go |
0x2 | STAT2 | ADC Status | Go |
0x3 | FLAG0 | Charger Flags 0 | Go |
0x4 | FLAG1 | Charger Flags 1 | Go |
0x5 | FLAG2 | ADC Flags | Go |
0x6 | FLAG3 | Timer Flags | Go |
0x7 | MASK0 | Interrupt Masks 0 | Go |
0x8 | MASK1 | Interrupt Masks 1 | Go |
0x9 | MASK2 | Interrupt Masks 2 | Go |
0xA | MASK3 | Interrupt Masks 3 | Go |
0x12 | VBAT_CTRL | Battery Voltage Control | Go |
0x13 | ICHG_CTRL | Fast Charge Current Control | Go |
0x14 | PCHRGCTRL | Pre-Charge Current Control | Go |
0x15 | TERMCTRL | Termination Current Control | Go |
0x16 | BUVLO | Battery UVLO and Current Limit Control | Go |
0x17 | CHARGERCTRL0 | Charger Control 0 | Go |
0x18 | CHARGERCTRL1 | Charger Control 1 | Go |
0x19 | ILIMCTRL | Input Corrent Limit Control | Go |
0x1D | LDOCTRL | LDO Control | Go |
0x30 | MRCTRL | MR Control | Go |
0x35 | ICCTRL0 | IC Control 0 | Go |
0x36 | ICCTRL1 | IC Control 1 | Go |
0x37 | ICCTRL2 | IC Control 2 | Go |
0x40 | ADCCTRL0 | ADC Control 0 | Go |
0x41 | ADCCTRL1 | ADC Control 1 | Go |
0x42 | ADC_DATA_VBAT_M | ADC VBAT Measurement MSB | Go |
0x43 | ADC_DATA_VBAT_L | ADC VBAT Measurement LSB | Go |
0x44 | ADC_DATA_TS_M | ADC TS Measurement MSB | Go |
0x45 | ADC_DATA_TS_L | ADC TS Measurement LSB | Go |
0x46 | ADC_DATA_ICHG_M | ADC ICHG Measurement MSB | Go |
0x47 | ADC_DATA_ICHG_L | ADC ICHG Measurement LSB | Go |
0x48 | ADC_DATA_ADCIN_M | ADC ADCIN Measurement MSB | Go |
0x49 | ADC_DATA_ADCIN_L | ADC ADCIN Measurement LSB | Go |
0x4A | ADC_DATA_VIN_M | ADC VIN Measurement MSB | Go |
0x4B | ADC_DATA_VIN_L | ADC VIN Measurement LSB | Go |
0x4C | ADC_DATA_PMID_M | ADC VPMID Measurement MSB | Go |
0x4D | ADC_DATA_PMID_L | ADC VPMID Measurement LSB | Go |
0x4E | ADC_DATA_IIN_M | ADC IIN Measurement MSB | Go |
0x4F | ADC_DATA_IIN_L | ADC IIN Measurement LSB | Go |
0x52 | ADCALARM_COMP1_M | ADC Comparator 1 Threshold MSB | Go |
0x53 | ADCALARM_COMP1_L | ADC Comparator 1 Threshold LSB | Go |
0x54 | ADCALARM_COMP2_M | ADC Comparator 2 Threshold MSB | Go |
0x55 | ADCALARM_COMP2_L | ADC Comparator 2 Threshold LSB | Go |
0x56 | ADCALARM_COMP3_M | ADC Comparator 3 Threshold MSB | Go |
0x57 | ADCALARM_COMP3_L | ADC Comparator 3 Threshold LSB | Go |
0x58 | ADC_READ_EN | ADC Channel Enable | Go |
0x61 | TS_FASTCHGCTRL | TS Charge Control | Go |
0x62 | TS_COLD | TS Cold Threshold | Go |
0x63 | TS_COOL | TS Cool Threshold | Go |
0x64 | TS_WARM | TS Warm Threshold | Go |
0x65 | TS_HOT | TS Hot Threshold | Go |
0x6F | DEVICE_ID | Device ID | Go |
Complex bit access types are encoded to fit into small table cells. Table 9 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
RC | C
R |
to Clear
Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |