ZHCSIM5F December 2016 – July 2018 AM5746 , AM5748 , AM5749
ADVANCE INFORMATION for pre-production products; subject to change without notice.
NOTE
For more information, see Power, Reset, and Clock Management / PRCM Subsystem Environment / External Clock Signals and External Reset Signals, and Clock Management Functional Description sections of the Device TRM.
NOTE
Audio Back End (ABE) module is not supported for this family of devices, but “ABE” name is still present in some clock or DPLL names.
The device operation requires the following clocks:
The Device also embeds an internal free-running 32-kHz oscillator that is always active as long as the wake-up (WKUP) domain is supplied.
Figure 5-7 shows the external input clock sources and the output clocks to peripherals.