SBASB93 June   2026 ADS9308V8I

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Current Sense Programmable Gain Amplifier
      2. 6.3.2 Voltage Sense Programmable Gain Amplifier (VPGA)
      3. 6.3.3 ADC Transfer Function
      4. 6.3.4 Reference
      5. 6.3.5 Digital Averaging Filter
      6. 6.3.6 Data Interface
        1. 6.3.6.1 ADC Channel Modes
    4. 6.4 Device Functional Modes
      1. 6.4.1 Reset
      2. 6.4.2 Normal Operation
      3. 6.4.3 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Register Write Operation
      2. 6.5.2 Register Read Operation
      3. 6.5.3 Initialization Sequence
    6. 6.6 Register Maps
      1. 6.6.1 ADS93x8V8I Common Registers
      2. 6.6.2 IS1 - IS8 Channel Registers
      3. 6.6.3 VS1 - VS8 Channel Registers
  8. 7 Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Multichannel Lithium-ion cell formation and test
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information
    2. 10.2 Mechanical Data

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RSK|64
散热焊盘机械数据 (封装 | 引脚)

6.5.2 Register Read Operation

The register banks for register read operation is selected using BANK_SEL register, address 0x02. To read registers in ADS93x8V8I Common register bank, write 0x0001, to the BANK_SEL register. Similarly, write 0x0002 and 0x0004 to BANK_SEL register, to read registers in IS1 - IS8 Channel and VS1 - VS8 Channel banks respectively. As illustrated in Figure 6-9, 24-bit SPI frames are required to read registers. Figure 6-9 describes the sequence required to read N number of registers in a register bank, and the steps required are described in Table 6-8.

ADS9308V8I Register Read Figure 6-9 Register Read
Table 6-8 Register Read Sequence
FRAME NUMBER 24-bit SDI frame SDOUT[23:0] DESCRIPTION
SDI[23:16] SDI [15:0]
1 0x02 0x0001 for register bank 0, 0x0002 for register bank 1, 0x0004 for register bank 2 X Selects the register bank.
2 0x01 SDIN[15:8] = REG_ADDR1, SDIN[7:0] = 0x01 0x000000 Register read operation for register address REG_ADDR1. The register data, REG_ADDR1, is received in the next serial communication frame.
3 0x01 SDIN[15:8] = REG_ADDR1, SDIN[7:0] = 0x01 SDOUT[23:8] = REG_ADDR1 DATA, SDOUT[7:0]= 0x00 Register read operation for register address REG_ADDR2. The register data, REG_ADDR1, is received in this frame. The register data, REG_ADDR2, is received in the next serial communication frame.
N+2 0x00 0x0000 SDOUT[23:8]= REG_ADDRN DATA, SDOUT[7:0]= 0x00 Write 0x000000 to the SDIN to read register value, address REG_ADDR, selected in the previous serial communication frame.